A Game-Changer for IP Designers: Design Stage Verification

A Game-Changer for IP Designers: Design Stage Verification
by Kalar Rajendiran on 03-04-2024 at 10:00 am

Calibre Shift Left Solutions Enable Reducing TTM

In today’s rapidly evolving semiconductor industry, the design and integration of intellectual property (IP) play a pivotal role in achieving competitive advantage and market success. Whether sourced from commercial IP providers or developed in-house, ensuring that IP designs are compliant with signoff requirements… Read More


Siemens Digital Industries Software Collaborates with AWS and Arm To Deliver an Automotive Digital Twin

Siemens Digital Industries Software Collaborates with AWS and Arm To Deliver an Automotive Digital Twin
by Mike Gianfagna on 11-28-2023 at 6:00 am

Siemens Digital Industries Software Collaborates with AWS and ARM To Deliver an Automotive Digital Twin

 

According to McKinsey & Company, a digital twin is a digital representation of a physical object, person, or process, contextualized in a digital version of its environment. Digital twins can help an organization simulate real situations and their outcomes, ultimately allowing it to make better decisions. Anyone… Read More


Optimizing Shift-Left Physical Verification Flows with Calibre

Optimizing Shift-Left Physical Verification Flows with Calibre
by Peter Bennet on 09-26-2023 at 6:00 am

Shift-left with Calibre

Advanced process nodes create challenges for EDA both in handling ever larger designs and increasing design process complexity.

Shift-left design methodologies for design cycle time compression are one response to this. And this has also forced some rethinking about how to build and optimize design tools and flows.

SemiWiki… Read More


A faster prototyping device-under-test connection

A faster prototyping device-under-test connection
by Don Dingee on 08-30-2022 at 6:00 am

ProtoBridge from S2C provides a high bandwidth prototyping device-unider-test connection

When discussing FPGA-based prototyping, we often focus on how to pour IP from a formative SoC design into one or more FPGAs so it can be explored and verified before heading off to a foundry where design mistakes get expensive. There’s also the software development use case, jumpstarting coding for the SoC before silicon … Read More


Shift left gets a modulated signal makeover

Shift left gets a modulated signal makeover
by Don Dingee on 03-31-2022 at 6:00 am

Modulated signals uncover combined effects in a shift left approach

Everyone saw Shift Left, the EDA blockbuster. Digital logic design, with perfect 1s and 0s simulated through perfect switches, shifted into a higher gear. But the dark arts – RF systems, power supplies, and high-speed digital – didn’t shift smoothly. What do these practitioners need in EDA to see more benefits from shift left? … Read More


Leveraging Virtual Platforms to Shift-Left Software Development and System Verification

Leveraging Virtual Platforms to Shift-Left Software Development and System Verification
by Kalar Rajendiran on 03-15-2022 at 6:00 am

Extend Accuracy with Hybrid Platforms

Ever since the cost of development started growing exponentially, engineering teams have been deploying a shift-left strategy to software development and system verification. While this has helped contain cost and accelerated product development schedules, a shift-left strategy is not without challenges. A virtual platform… Read More


The Quest for Bugs: “Shift-Left, Right?”

The Quest for Bugs: “Shift-Left, Right?”
by Bryan Dickman on 08-10-2021 at 10:00 am

Quest for Bugs Shift Left EDA

Shift-left, why?

Shift-left testing is an approach to software and system testing which is performed earlier in the lifecycle (that is, moved left on the project timeline). It is the first half of the “Test early and often” maxim that was coined by Larry Smith in 2001.

It’s now an established idea, much talked about … Read More


Shifting Left with Static and Formal Verification

Shifting Left with Static and Formal Verification
by Bernard Murphy on 12-14-2017 at 7:00 am

Unless you have been living in a cave for the last several years, by now you know that “Shift Left” is a big priority in product design and delivery, and particularly in verification. Within the semiconductor industry I believe Intel coined this term as early as 2002, though it seems now to be popular throughout all forms of technology… Read More


Building a Virtual Prototype

Building a Virtual Prototype
by Bernard Murphy on 12-20-2016 at 7:00 am

I wrote recently about how virtual prototypes (in the form of VDKs) can help embedded software teams practice continuous integration. Synopsys has just released a white paper detailing a practical approach to building a VDK, using the Juno ARM development platform (ADP) to illustrate. Just as a reminder, the point of a virtual… Read More


SoC’s Shift Left Needs Software Integrity

SoC’s Shift Left Needs Software Integrity
by Pawan Fangaria on 05-05-2015 at 3:00 pm

Since Aart de Geus, co-CEO and co-founder of Synopsys, gave his keynote at the Synopsys User Group (SNUG) conference in Silicon Valley last March, I’ve been hearing a lot more about the “Shift Left” in semiconductor design. Although I couldn’t attend Synopsys’ 25[SUP]th[/SUP]SNUG, I found some short videos on the Synopsys website… Read More