Atrenta did an online survey of their users. Of course Atrenta’s users are not necessarily completely representative of the whole marketplace so it is unclear how the results would generalize for the bigger picture, your mileage may vary. About half the people were design engineers, a quarter CAD engineers and the rest … Read More
HSPICE is over 30 years old, which is a testimony of how solid the circuit simulator has been and how widely used it is. To stay competitive the HSPICE developers have to innovate or the product will slowly loose ground to the many other simulator choices. I listened to the webinar last week to find out what was new with HSPICE.
My last IC design at Intel was a Graphics Chip and I developed a layout generator for Programmable Logic Arrays (PLA) that automated the task, so I’ve always been interested in how to make IC layout more push-button and less polygon pushing. Today I watched a video about HiPer DevGen from Tanner EDA and wanted to share what I … Read More
Tensilica has been around for quite a long time. Their key technology is a system for generating a custom processor, the idea being to better match the requirement of the processor for performance, power and area as compared with a fully-general purpose control processor (such as one of the ARM processors). Of course generating… Read More
There are lots of places that Apache is going to popping up in the next few weeks.
Firstly, Andrew Yang will deliver the keynote on October 24th at the Electrical Performance of Electronic Packaging and Systems (EPEPS) in San Jose. He will be talking about “Chip-Package-System convergence: bridging multiple disciplings… Read More
If you ask design groups what the biggest challenges are to getting a chip out on time, then the top two are usually verification, and getting closure after physical design. Not just timing closure, but power and area. One of the big drivers of this is predicting and avoiding excessive routing congestion, which is something that … Read More
I surmised a month ago that Broadcom could be a likely acquirer of TI’s OMAP business in order to compete more effectively in Smart Phones and Tablets. I was not bold enough. Instead, Broadcom has offered $3.7B for Netlogic in order to be an even bigger player in the communications infrastructure market by picking up TCAMs and a family… Read More
Next Tuesday, August 23rd, is the ANSYS Regional Conference for Silicon Valley. It takes place at the Techmart Network Meeting Center. Apache has three presentations during the day:
- 9.25-9.45 Andrew Yang Introducing Apache Design Solutions
- 11.00-11.30 Methodology for delivering power-efficient designs from concept to
So Google is buying Motorola Mobility for $12.5B. If you are a partner of Google using Android then this has both upside and downside. The upside is that Motorola, having been in wireless for longer than almost anyone, presumably has a pretty good patent portfolio that can be used to defend against Apple, Nokia, Microsoft et al. The… Read More
If Cadence is making money with large VIP port-folio, Synopsys has successfully deployed an acquisition strategy to build a large Design IP port-folio. Looking at these acquisitions will help understanding Synopsys positioning in the IP market. When they have started this acquisition campaign, back in 2002, their market share… Read More