Intel Quark: Synthesizable Core?

Intel Quark: Synthesizable Core?
by Paul McLellan on 09-10-2013 at 1:43 pm

At IDF Brian Krzanich gave the keynote. I won’t summarize the whole thing here but just talk about one part that was something they had actually managed to keep secret ahead of time: Quark.

Quark is a synthesizable core. It uses 1/10th power of Atom and is 1/5 size. Now I am writing this, I don’t know if this is a fair comparison… Read More


GlobalFoundries Expands in Singapore

GlobalFoundries Expands in Singapore
by Paul McLellan on 09-09-2013 at 8:30 pm

GlobalFoundries has been in Singapore for a long time. Longer than GlobalFoundries has existed in fact. Chartered Semiconductor was started in Singapore in 1987 and GF acquired them in early 2010 less than a year after they were created by spinning out the manufacturing arm of AMD. When GF was started their state of the art fab was… Read More


TSMC OIP: Mentor’s 5 Presentations

TSMC OIP: Mentor’s 5 Presentations
by Paul McLellan on 09-09-2013 at 6:30 pm

At TSMC’s OIP on October 1st, Mentor Graphics have 5 different presentations. Collect the whole set!

11am, EDA track. Design Reliability with Calibre Smartfill and PERC. Muni Mohan of Broadcom and Jeff Wilson of Mentor. New methodologies were invented for 28nm for smart fill meeting DFM requirements (and at 20nm me may … Read More


Verifying Hardware at the C-level

Verifying Hardware at the C-level
by Paul McLellan on 09-09-2013 at 2:25 pm

As more people adopt high-level synthesis (HLS) they start to worry about what is the best design flow to be using. This is especially so for verification since it forms such a large part of the effort on a modern SoC. The more people rely on HLS for producing their RTL from C, the more they realize they had better do a good job of verifying… Read More


Xilinx At 28nm: Keeping Power Down

Xilinx At 28nm: Keeping Power Down
by Paul McLellan on 09-08-2013 at 2:26 pm

Almost without exception these days, semiconductor products face strict power and thermal budgets. Of course there are many issues with dynamic power but one big area that has been getting increasingly problematic is static power. For various technical reasons we can no longer reduce the voltage as much as we would like from one… Read More


SpyGlass: Focusing on Test

SpyGlass: Focusing on Test
by Paul McLellan on 09-07-2013 at 5:51 pm

For decades we have used a model of faults in chips that assumes that a given signal is stuck-at-0 or stuck-at-1. And when I say decades, I mean it. The D-algorithm was invented at IBM in 1966, the year after Gordon Moore made a now very famous observation about the number of transistors on an integrated circuit. We know that stuck-at… Read More


Base Stations Move Away From Fixed Architecture DSP

Base Stations Move Away From Fixed Architecture DSP
by Paul McLellan on 09-06-2013 at 1:59 pm

Handsets moved away from fixed architecture DSP some time ago, driven by two main factors. Fixed architecture DSP consumed too much power to get good battery life in the smart-phone era, but the consumer air interface was changing fast: W-CDMA, HSPA, WiMax, 3G, LTE (which is actually a whole ‘spectrum’ of different… Read More


3D: the Backup Plan

3D: the Backup Plan
by Paul McLellan on 09-05-2013 at 1:20 pm

With the uncertainties around timing of 450mm wafers, EUV (whether it works at all and when) and new transistor architectures it is unclear whether Moore’s law as we know it is going to continue, and in particular whether the cost per transistor is going to remain economically attractive especially for consumer markets … Read More


Microsoft Buys Nokia

Microsoft Buys Nokia
by Paul McLellan on 09-02-2013 at 11:21 pm

OK. I was wrong. Microsoft did buy Nokia’s handset business. For $7.2B, which for a company that just wrote off nearly $1B on tablets isn’t that much. Nokia is a company that had a peak valuation of $110B although it is not clear how much of that is in the deal versus out of the deal.

Details from Reuters here.

Elop is expected… Read More


Analog ECOs and Design Reviews: How to Do Them Better

Analog ECOs and Design Reviews: How to Do Them Better
by Paul McLellan on 09-02-2013 at 1:00 am

One of the challenges in doing a complex analog or mixed signal design is that things get out of step. One designer is tweaking the schematic and re-simulating, another is tweaking the layout of transistors, another is changing the routing. This is not because the design flow is messed up, but rather it reflects reality. If you wait… Read More