FlexE at SoC IP Days with Open Silicon

FlexE at SoC IP Days with Open Silicon
by Daniel Nenni on 03-30-2018 at 12:00 pm

On Thursday April 5th the Design and Reuse SoC IP days continues in Santa Clara at the Hyatt Regency (my favorite hangout). SemiWiki is a co-sponsor and I am Chairman of the IP Security Track. More than 400 people have registered thus far and I expect a big turnout, if you look at the program you will see why. You should also know that registration… Read More


Getting Started with RISC-V

Getting Started with RISC-V
by Daniel Nenni on 01-06-2018 at 4:00 pm

As I mentioned before, SiFive and RISC-V are trending topics on SemiWiki.com which makes complete sense since we have been covering semiconductor IP and ARM since we first went online in January of 2011.

In total we have published 707 IP related blogs that earned 3,565,140 views (5043 views per blog average). Out of that, 254 are … Read More


2017 in Review and 2018 Forecast

2017 in Review and 2018 Forecast
by Daniel Nenni on 12-30-2017 at 7:00 am

This has been an amazing year for me both personally and professionally. Personally we are now empty nest and have our first grandchild. SemiWiki is prospering, a company that I have been involved with for ten years (Solido Design) had a very nice exit, and my time promoting semiconductor stocks to Wall Street paid off with the PHLXRead More


Application binary interface, get this right and RISC-V is all yours

Application binary interface, get this right and RISC-V is all yours
by kunalpghosh on 12-15-2017 at 7:00 am

Starting a career in static timing analysis domain, and now actively working on an opensource implementation flow of RISC-V architecture, has been a journey. For last couple of months, I guess from around March this year, I was hooked to RISC-V buzz which was all over my Linkedin, my messages.

Being an STA and Physical design engineer,… Read More


RISC-V Business

RISC-V Business
by Tom Simon on 12-04-2017 at 7:00 am

I was at the 7[SUP]th[/SUP] RISC-V Workshop for two days this week. It was hosted by Western Digital at their headquarters in Milpitas. If you have not been following RISC-V, it is an open source Instruction Set Architecture (ISA) for processor design. The initiative started at Berkeley, and has been catching on like wildfire. … Read More


DesignShare is all About Enabling Design Wins!

DesignShare is all About Enabling Design Wins!
by Daniel Nenni on 11-08-2017 at 7:00 am

One of the barriers to silicon success has always been design costs, especially if you are an emerging company or targeting an emerging market such as IoT. Today design start costs are dominated by IP which is paid at the start of the project and that is after costly IP evaluations and other IP verification and integration challenges.… Read More


Open source RISC-V ISA brings a new wrinkle to the processor market

Open source RISC-V ISA brings a new wrinkle to the processor market
by Tom Simon on 10-25-2017 at 12:00 pm

By now most people are quite comfortable with the idea of using an open source operating system for many computing tasks. It speaks volumes that Unix, and Linux in particular, is used in the vast majority of engineering, financial, data base, machine learning, data center, telecommunications and many other applications. It was… Read More


SiFive RISC-V and the Future of Computing!

SiFive RISC-V and the Future of Computing!
by Daniel Nenni on 08-17-2017 at 12:00 pm

Having started my career during the mini computer revolution it has been an incredible journey from using computers that consumed entire rooms – to the desktop – and now we have supercomputers in our pockets. It makes me chuckle when I hear people complaining about their smartphones when they should be jumping up and… Read More


SiFive execs share ideas on their RISC-V strategy

SiFive execs share ideas on their RISC-V strategy
by Don Dingee on 10-03-2016 at 4:00 pm

Since its formation just last year, SiFive has been riding the RISC-V rocket from purely academic interest to first commercialization. In an exclusive discussion, I talked with CEO Stefan Dyckerhoff and VP of Product and Business Development Jack Kang about their progress so far and what may be coming next.


Previously, I covered… Read More


The Perfect Wearable SoC…?

The Perfect Wearable SoC…?
by Rick Tewell on 08-23-2016 at 12:00 pm

Power is Everything
During Apollo 13 after the oxygen tank in the service module exploded forcing the crew to use the lunar module as a life boat to get back home, John Aaron – an incredibly gifted NASA engineer who was tasked with getting the Apollo 13 crew back home safely – flatly stated “Power is everything…we’ve… Read More