Open-Silicon, Credo and IQ-Analog Provide Complete End-to-End Networking ASIC Solutions

Open-Silicon, Credo and IQ-Analog Provide Complete End-to-End Networking ASIC Solutions
by Camille Kokozaki on 04-26-2018 at 12:00 pm

The end-to-end principle as defined by Wikipedia is a design framework in computer networking. In networks designed according to this principle, application-specific features reside in the communicating end nodes of the network, rather than in intermediary nodes, such as gateways and routers, that exist to establish the … Read More


FlexE at SoC IP Days with Open Silicon

FlexE at SoC IP Days with Open Silicon
by Daniel Nenni on 03-30-2018 at 12:00 pm

On Thursday April 5th the Design and Reuse SoC IP days continues in Santa Clara at the Hyatt Regency (my favorite hangout). SemiWiki is a co-sponsor and I am Chairman of the IP Security Track. More than 400 people have registered thus far and I expect a big turnout, if you look at the program you will see why. You should also know that registration… Read More


Herb Reiter on the Challenges of 2.5D ASIC SiPs

Herb Reiter on the Challenges of 2.5D ASIC SiPs
by Daniel Nenni on 02-23-2018 at 12:00 pm

Years ago my good friend Herb Reiter promoted the importance of 2.5D packaging to anybody and everybody who would listen including myself. Today Herb’s vision is in production and the topic of many papers, webinars, and conferences. According to Herb, and I agree completely, advanced IC packaging is an important technology for… Read More


Open Silicon Year in Review 2017

Open Silicon Year in Review 2017
by Daniel Nenni on 01-31-2018 at 7:00 am

If you are interested in what types of chips we will see in the coming years always ask an ASIC provider because they know. Companies of all sizes (small-medium-large) use ASIC companies to get their chips out in the least amount of time and at a minimum cost because that is what ASIC companies do.

IP is an important ingredient to the … Read More


New e-Book – Custom SoCs for IoT: Simplified – Available for Free Download

New e-Book – Custom SoCs for IoT: Simplified – Available for Free Download
by Mitch Heins on 11-17-2017 at 12:00 pm

We are fortunate to be living in one of the most amazing and exciting times in the history of our planet. The developments seen in my life time alone have been astounding and we are now on the cusp of yet another inflection point. The world wide web has morphed into the internet of things (IoT), some even call it the internet-of-everything… Read More


Navigating the System-in-a-Package Manufacturing Ecosystem

Navigating the System-in-a-Package Manufacturing Ecosystem
by Mitch Heins on 10-26-2017 at 12:00 pm

Being an old ASIC physical design guy, I tend to think of ASICs from a “bond-pads-in” perspective. This week however, I had a very eye-opening discussion with Dan Leung, Director of Packaging and Assembly for Open-Silicon, that totally changed my perspective. While I had been exposed many times to the concept of systems-in-a-package… Read More


ARM TechCon 2017 Preview with Mentor!

ARM TechCon 2017 Preview with Mentor!
by Daniel Nenni on 10-18-2017 at 7:00 am

Next week is ARM TechCon which is one of my favorite conferences (SemiWiki is an event partner). This year is lucky number thirteen for ARM TechCon and it includes more than sixty hours of sessions plus more than one hundred ARM partners in the exposition. I will be signing free copies of our new book “Custom SoCs for IoT: Simplified”… Read More


Open Silicon Delivers Silicon-Verified HBM2 IP-Subsystem on TSMC 16nm FF+

Open Silicon Delivers Silicon-Verified HBM2 IP-Subsystem on TSMC 16nm FF+
by Mitch Heins on 09-20-2017 at 12:00 pm

Open Silicon hosted a webinar today focusing on their High Bandwidth Memory (HBM) IP-subsystem product offering. Their IP-subsystem is based on the HBM2 standard and includes blocks for the memory controller, PHY and high-speed I/Os, all targeted to TSMC 16nm FF+ process. The IP-subsystem supports the full HBM2 standard with… Read More


High Bandwidth Memory ASIC SiPs for Advanced Products!

High Bandwidth Memory ASIC SiPs for Advanced Products!
by Daniel Nenni on 08-30-2017 at 7:00 am

When someone says, “2.5D packaging” my first thought is TSMC and my second thought is Herb Reiter. Herb has more than 40 years of semiconductor experience and he has been a tireless promoter of 2.5D packaging for many years. Herb writes for and works with industry organizations on 2.5D work groups and events at conferences… Read More