We are excited to announce that Truechip, a leading provider of Verification IP solutions, will be actively participating at DAC 2024, taking place from June 23-25 at Moscone West, San Francisco, CA. This event is a pivotal gathering for professionals in the verification industry, and Truechip’s presence will be a highlight … Read More
The Interface IP market has grown with 21% CAGR from 2017 to 2021 and we review the part of this market restricted to the high-end of PCIe, DDR, Ethernet and D2D IP made of PHY and controller targeting the most advanced technology nodes and latest protocol release. We will show that an IP vendor focusing investment on the high-end interconnect… Read More
Prototyping solutions have been in the news a lot lately. And FPGA-based prototyping approach is pretty widely used. On a panel session at DAC 2021, Amir Salek, Head of Silicon for Cloud and Infrastructure at Google had the following to say. Prototyping FPGA is a tremendous platform for testing and validation. We are doubling down… Read More
We live in the age of big data. No matter how fast and complex modern SoCs are, it all comes down to how quickly data can get in and out that determines the system performance. And, there is a lot of data that today’s systems need to process. Naturally, system interfaces such as PCIe, DDR, HBM, etc., have been evolving rapidly too, to support… Read More
At DesignCon 2020, there was a presentation by Micron, Socionext and Cadence that discussed design challenges and strategies for using the new low-power DDR specification (LPDDR5). As is the case with many presentations at DesignCon, ecosystem collaboration was emphasized. Justin Butterfield (senior engineer at Micron)… Read More
Choosing a memory architecture can be a daunting task. There are many options to choose from, each with their own power, performance, area and cost profile. The right choice can make a new design competitive and popular in the market. The wrong choice can doom the whole project to failure.
Vadhiraj Sankaranarayanan, senior technical… Read More
Synopsys announced on October 24 new DesignWare[SUP]®[/SUP] Memory Interface IP solutions supporting the next-generation DDR5 and LPDDR5 SDRAMs. The DDR5 and LPDDR5 IP significantly increase memory interface bandwidth compared to DDR4 and LPDDR4/4X SDRAM interfaces, while reducing area and improving power efficiency.… Read More
The global Interface IP market is still growing in 2015, no doubt about it. It’s interesting to zoom in the various protocols to check their respective behavior. Which protocol generates an IP business growing more than the average market? Which protocol generates a disappointing IP business? In other words, which are the winners… Read More
