Chip Design – Coming of Age in the Computer Age

Chip Design – Coming of Age in the Computer Age
by Mike Gianfagna on 05-13-2015 at 2:30 am

Previously, I examined chip design in the late 1970s and early 1980s. It was a nostalgic ride – thanks to all those who shared their stories. I enjoyed reading all of them. I drew two basic conclusions in the prior post:

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  • Chip design problems are the same, more or less, over time. The numbers just get bigger
  • Raising abstraction
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    Chip Design Problems Remain the Same, More or Less

    Chip Design Problems Remain the Same, More or Less
    by Mike Gianfagna on 05-09-2015 at 2:00 pm

    For those who may not know me, here is a brief introduction. I started in the semiconductor business when RCA was still making vacuum tubes and I wrote EDA software before there was an EDA industry. I’ve designed and sold chips and developed, sold and used EDA tools at companies as big as General Electric and as small as seven people.… Read More


    Making IP Reuse and SoC Integration Easier

    Making IP Reuse and SoC Integration Easier
    by Daniel Payne on 07-31-2014 at 2:00 pm

    The last graphics chip that I worked on at Intel was functionally simulated with only a tiny display size of 16×16 pixels, because that size allowed a complete regression test to be simulated overnight. Our team designed three major IP blocks: Display Processor, Graphics Processor and Bus Interface Unit. We wanted to also… Read More


    A song of optimization and reuse

    A song of optimization and reuse
    by Don Dingee on 07-01-2014 at 10:00 am

    If you hang around engineers for any time at all, the word optimization is bound to come up. The very definition of engineer is to contrive or devise a solution. With that anointing, most engineers are beholden to the idea that their job is creating, synthesizing, and perfecting a solution specifically for the needs of a unique situation.… Read More


    Leveraging Design Team Energy!

    Leveraging Design Team Energy!
    by Eric Esteve on 05-03-2014 at 5:12 am

    Once upon a time, in 1987 to be specific, a French design team was trying to develop a 100% Made in France supercomputer. In fact, not really 100%, as the CPU chips were supposed to be made by Weitek, but we never saw any of these chips, probably too challenging to be designed right first time! Anyway, I was in charge of the design of the … Read More


    6 reasons Synopsys covets C/C++ static analysis

    6 reasons Synopsys covets C/C++ static analysis
    by Don Dingee on 02-20-2014 at 5:00 pm

    By now, you’ve probably seen the news on Synopsys acquiring Coverity, and a few thoughts from our own Paul McLellan and Daniel Payne in commentary, who I respect deeply – and I’m guessing there are many like them out there in the EDA community scratching their heads a little or a lot at this. I’m not from corporate, but I am here… Read More


    Something old, something new in SystemC HLS

    Something old, something new in SystemC HLS
    by Don Dingee on 08-26-2013 at 5:00 pm

    Perhaps no area in EDA has been as enigmatic as high-level synthesis (HLS). At nearly every industry event, some new-fangled tool always seems to be tabbed as the next big thing by some analyst or pundit. In a twist, the latest news is on one of the oldest tools – CybeWorkBench.… Read More


    Scan the horizon, P1687 takes us higher

    Scan the horizon, P1687 takes us higher
    by Don Dingee on 07-31-2013 at 6:00 pm

    The tech standards cycle almost always goes like this: Problems or limits develop with the existing way of doing things. Innovators attempt to engineer solutions, usually many of them. Chaos ensues when customers figure out nothing new works with anything else. Competitors sit down and agree on a specification where things work… Read More


    UVM: Lowering the barrier to IP reuse

    UVM: Lowering the barrier to IP reuse
    by Don Dingee on 02-06-2013 at 2:00 am

    One of my acquaintances at Intel must have some of the same viewing habits I do, based on a recent Tweet he sent. He was probably watching “The Men Who Built America” on the History Channel and thinking as I have a lot recently about how the captains of industry managed to drive ideas to monopolies in the late 1800s and early 1900s.

    Difference

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    Sagantec 2 Migrate iPad2s @ #48DAC

    Sagantec 2 Migrate iPad2s @ #48DAC
    by admin on 05-30-2011 at 2:53 pm

    Sagantec is the leading EDA provider of process migration solutions for custom IC design. Sagantec’s EDA solutions enable IC designers to leverage their investment in existing physical design IP and accomplish dramatic time and effort savings in the implementation of custom, analog, mixed-signal and memory circuits… Read More