Custom AI acceleration continues to gather steam. In the cloud, Alibaba has launched its own custom accelerator, following Amazon and Google. Facebook is in the game too and Microsoft has a significant stake in Graphcore. Intel/Mobileye have a strong lock on edge AI in cars and wireless infrastructure builders are adding AI capabilities… Read More
Learning is a never-ending process for design and verification engineers, so outside of reading SemiWiki you likely want to attend at least a few events per year to keep updated, learn something new, attend a workshop, or even present something that has made your IC project work much better than before. Sure, DAC is always a great… Read More
Formal verification has made significant inroads in RTL and gate-level verification because it provides complementary strengths to conventional dynamic verification methods; using both provides higher levels of coverage and confidence in the correctness of an implementation. I haven’t heard as much about formal use in … Read More
I previously wrote a blog about a session from Day 1 of the AI Hardware Summit at the Computer History Museum in Mountain View, CA, held just last week. From Day 2, I want to delve into this presentation by Bryan Bowyer, Director of Engineering, Digital Design & Implementation Solutions Division at Mentor, a Siemens Business.… Read More
Complex algorithms do not exist in a vacuum. After HLS is used to create an RTL component, to be useful, it needs to be integrated into a larger system. This means connecting it to other components, a processor, and even software. Once integrated, the system needs to be verified. The verification of the complete environment… Read More
Neural networks are typically developed and trained in a high-performance 32-bit floating-point compute environment. But, in many cases a custom hardware solution is needed for the inference engine to meet power and real-time requirements. Each neural network and end-application may have different performance… Read More
HLS has been used in multiple companies, projects, and designs targeting vision processing for the past several years. HLS adoption continues to grow because it is the fastest way to turn complex algorithms into efficient hardware implementations. HLS creates a methodology that enables design teams to rapidly react… Read More
HLS has been around for years, so why are we seeing such growth now? This webinar starts with an introduction of basic HLS concepts, design methodologies, best fits for HLS with customer use cases/highlights that explain the benefits they experienced and their adoption path. It will then move to a discussion of trends … Read More
In the early days of chip design circa 1970’s the engineers would write logic equations, then manually reduce that logic using Karnaugh Maps. Next, we had the first generation of logic synthesis in the early 1980’s, which read in a gate-level netlist, performed logic reduction, then output a smaller gate-level netlist.… Read More
AI accelerators as engines for object or speech recognition (among many possibilities), are becoming increasingly popular for inference in mobile and power-constrained applications. Today much of this inferencing runs largely in software on CPUs or GPUs thanks to the sheer size of the smartphone market, but that will shift… Read More
