There have been a lot of interesting announcements and presentations lately from the leading edge foundries. Looking at all of this information, a pretty interesting picture begins to emerge.
TSMC
TSMC is far and away the world’s largest foundry. In their 2014-Q2 conference call TSMC outlined their expectations for the balance… Read More
Earlier in the week, eSilicon and IDT announced a collaboration to accelerate development of next-generation RapidIO switches. These are used to meet the higher performance demands required for new wireless, embedded and computing infrastructures. The two companies will initially work together to develop RapidIO switches… Read More
GlobalFoundries is running a series of technical seminars in the US and Europe, following on from the successful versions run last month in Shanghai and Hsinchu. Among the topics that will be discussed are Foundry 2.0 and Collaborative Device Manufacturing for both Leading Edge and Mainstream technologies. The European events… Read More
The first surprise of the opening keynote for Semicon West was on the slides that were cycling on the screen as the room filled up. Somehow our book Fabless had managed to be in the rotation.
The opening keynote was by Mark Adams, the President of Micron. He was talking about upcoming big changes in the semiconductor environment, although… Read More
Next week it is Semicon West, the big equipment vendor tradeshow. I love to go since EDA and semiconductor and all the stuff we are interested in here at Semiwiki are driven by equipment capabilities, especially lithography. The highest viewed blogs I write tend to be ones on technologies that are just a bit out beyond the stuff people… Read More
One of the most important and underrated tasks in a semiconductor company is creating the cost model. This is needed in order to be able to price products, and is especially acute in an ASIC or foundry business where there is no sense of a market price because the customer and not the manufacturer owns the intellectual property and … Read More
Pop quiz: eSilicon has a big IP development group in what Asian country? If you didn’t know and you guessed, you probably got it wrong with China or India. It is Vietnam. In fact they have two sites. One in Ho Chi Minh City (that used to be called Saigon) and one in Da Nang.
At Electronic Design Process Symposium (EDPS) held last … Read More
At Mentor’s U2U this afternoon I attended a presentation on TSMC’s use of Calibre PERC (it is a programmable electrical rule checker) for qualification of IP in TSMC’s IP9000 program. I’ve written about this before here. Basically IP providers at N20SOC, N16FF, and below are required to use PERC to guarantee… Read More
At the GSA Silicon Summit this afternoon there was a discussion of 3D IC and 2.5D IC. The session was moderated by Javier DeLaCruz of eSilicon and the panelists were:
I’m at the GSA Silicon Summit today, at the computer history museum. The first panel session this morning was about future process technology. It was moderated by Joe Sawicki of Mentor with a panel consisting of Rob Aitken from ARM, Paul Farrar of G450C, Peter Huang of TSMC, John Kibarian of PDF Solutions and someone from Applied… Read More
