Verification technologies have progressed in almost all domains over the years. We’re now substantially more productive in creating tests for block, SoC and hybrid software/hardware verification. These tests provide better coverage through randomization and formal modeling. And verification engines are faster – substantially… Read More
Synopsys Webinar | Wednesday, July 27, 2022 | 10:00 a.m. Pacific
Analyzing the thousands of failures from daily regression runs is a manual, tedious, and error-prone process. The process can significantly impact quality-of-results, time-to-results and cost-of-results. The Synopsys Verdi® Regression Debug Automation
Manish Pandey, VP R&D and Fellow at Synopsys, gave the keynote this year. His thesis is that given the relentless growth of system complexity, now amplified by multi-chiplet systems, we must move the verification efficiency needle significantly. In this world we need more than incremental advances in performance. We need… Read More
With today’s more complex designs, we tend to see a growing productivity gap between design and verification, so we need to maximize the reusability of your verification environment, improve the automation, raise the level of abstraction… but we need higher performance, context-aware debug supporting the complete logic verification
SoC integration offers huge benefits through reduced chip count in finished systems, higher performance, improved reliability, etc. A single die can contain billions of transistors, with multiple processors and countless subsystems all working together. The result of this has been rapid growth of semiconductor content … Read More
Complex testing and methodology with complex silicon require powerful but simple to use debug solutions. The Visualizer Debug Environment provides a common debug solution for simulation, emulation and other engines,
There are 3 common misconceptions about debugging FPGA with the real hardware:
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In the spectrum of functional verification platforms – software-based simulation, emulation and FPGA-based prototyping – it is generally agreed that while speed shoots up by orders of magnitude (going left to right) ease of debug drops as performance rises and setup time increases rapidly, from close to nothing for simulation… Read More
Virtual prototyping has, inexplicably, been largely a DIY thing so far. Tools and models have come from different sources with different approaches, and it has been up to the software development team to do the integration step and cobble together a toolchain and methodology that fits with their development effort.
That integration… Read More
Israel has a strong pedigree in functional verification. Among others, Verisity (an early contributor to class-based testbench design and constrained random testing) started in Israel and RocketTick (hardware-based simulation acceleration), acquired more recently by Cadence, is based in Israel. So when I hear about an … Read More
