It may seem odd to look to the CIA for viewpoints in this area but in in many ways they are just as concerned as we are. After all, in aggregate, widespread identity theft and hacking both internally and by foreign nationals, theft, electronic ransom and other illicit acts are as much a threat to the security of the country as they are … Read More
Tag: bernard murphy
SystemC and Adam’s Law
At DVCon I sat in on a series of talks on using higher-level abstraction for design, then met Adam Sherer to get his perspective on progress in bringing SystemC to the masses (Adam runs simulation-based verification products at Cadence and organized the earlier session). I have to admit I have been a SystemC skeptic (pace Gary Smith)… Read More
One, Two, Many – Why You May Not Be Replaced By A Robot
Some aboriginal tribes in Australia see little value in counting and are believed to discriminate only between “one”, “two” and “many”. This is not through lack of intelligence; beyond two they simply lose interest in the details. We can smile and feel superior but I suspect we are not much better when it comes to predicting our technology… Read More
VC Apps Tutorial at DVCon 2016
We might wish that all our design automation needs could be handled by pre-packaged vendor tool features available at the push of a button, but that never was and never will be the case. In the language of crass commercialism, there may be no broad market for those features, even though you consider that analysis absolutely essential.… Read More
Software-Driven Verification and Portable Stimulus
I was at every single lunch at DVCon, not because the food was that great (it wasn’t bad) but because the topics were all interesting. The Wednesday lunch, hosted by Cadence, was a panel on software-driven verification and portable stimulus, moderated by Frank Schirrmeister (a different role for Frank – he’s usually a panel member… Read More
Verdi Update and NVIDIA on Verification Compiler
Synopsys hosted a lunch session on Thursday of DVCon. Michael Sanie of Synopsys opened the session, with a look back at the last DVCon where he had talked about Verification Compiler (VC) and extending the platform to Verification Continuum, which adds emulation and FPGA-based prototyping (HAPS – there was a very cool HAPS demo… Read More
Mentor at DVCon – Visualize This
Steve Bailey entertained us during lunch on Tuesday with a talk on debug and visualization in the Mentor platform. Steve is based in Colorado, so had to spend the first part of his talk gloating about their Super Bowl win, but I guess he deserves that.
On a more technical note, he showed us a familiar survey they had completed with the… Read More
Accellera and Portable Stimulus
I’ll start with a quick note on DVCon. This seems to be gaining momentum each year. In addition to the events in the US, Europe and India, a DVCon event is now planned for China, kicking off in Shanghai in 2017. At a time when we’re all bemoaning the future of EDA and EDA conferences, DVCon is booming internationally, no doubt reflecting… Read More
Ajoy – History, Perspectives and Crossing the Chasm
EDAC hosted an event at DVCon this week where Jim Hogan interviewed Ajoy Bose (CEO of Atrenta prior to its acquisition by Synopsys). The nominal purpose was to talk about turning a venture into a valuable enterprise. This was covered but, in Jim’s way, it was really a more wide-ranging and personal interview. This is an abstract of… Read More
Life, the Universe and Everything
In Douglas Adams’ iconic series A hitchhiker’s guide to the galaxya super-intelligent species created a super-powerful computer called Deep Thought to answer the ultimate question – what is the meaning of life (and the universe and everything)? Life imitates art so it should come as no surprise that a team in London founded a venture… Read More