Tag: automation

DAC 2024

DAC 2024
by Admin on 09-25-2023 at 5:17 pm

About DAC

The Design Automation Conference (DAC) is recognized as the premier event for the design and design automation of electronic chips to systems.  DAC offers outstanding training, education, exhibits and superb networking opportunities for designers, researchers, tool developers and vendors. The conference is sponsored… Read More

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Tessent SSN Enables Significant Test Time Savings for SoC ATPG

Tessent SSN Enables Significant Test Time Savings for SoC ATPG
by Kalar Rajendiran on 05-08-2023 at 6:00 am
Categories: EDA, Siemens EDA

Pattern Generation Block Level ATPG Flow

SoC test challenges arise due to the complexity and diversity of the functional blocks integrated into the chip. As SoCs become more complex, it becomes increasingly difficult to access all of the functional blocks within the chip for testing. SoCs also can contain billions of transistors, making it extremely time-consuming… Read More

28th Asia and South Pacific Design Automation Conference (ASP-DAC)

28th Asia and South Pacific Design Automation Conference (ASP-DAC)
by Admin on 12-09-2022 at 1:08 pm

ASP-DAC is the largest conference in Asia and South-Pacific regions on Electronic Design Automation (EDA) area for VLSI and systems. ASP-DAC has been started at 1995 and this ASP-DAC 2023 is 28th conference. ASP-DAC 2023 offers you an ideal opportunity to touch the recent technologies and the future directions on the LSI design… Read More

Webinar: Electronics Desktop Automation with Ansys PyAEDT and Ansys Maxwell

Webinar: Electronics Desktop Automation with Ansys PyAEDT and Ansys Maxwell
by Admin on 12-05-2022 at 1:57 pm

Ansys embraces Python as a scripting language in conjunction with Ansys AEDT when running multiple tools for computational multiphysics simulations. This webinar explores PyAEDT and provides a specific application example with Ansys Maxwell as a case study.

TIME:

DECEMBER 7, 2022

11 AM EST / 4 PM GMT / 9:30 PM IST

About this Webinar

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Design Automation Conference (DAC 60)

Design Automation Conference (DAC 60)
by Admin on 11-07-2022 at 3:32 pm

About DAC

The Design Automation Conference (DAC) is recognized as the premier event for the design and design automation of electronic chips to systems.  DAC offers outstanding training, education, exhibits and superb networking opportunities for designers, researchers, tool developers and vendors. The conference is sponsored… Read More

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Truechip Introduces Automation Products – NoC Verification and NoC Performance

Truechip Introduces Automation Products – NoC Verification and NoC Performance
by Kalar Rajendiran on 11-07-2022 at 10:00 am
Categories: IP, Truechip

Truechip NoC Automation Product

While Truechip has established itself as a global provider of verification IP (VIP) solutions, they are always on the lookout for strategic IP needs from their customer base. Over the last several years, a solid market for Network-on-Chip (NoC) IP has grown, driven by the need to rapidly move data across a chip. Concurrently, the… Read More

Webinar: Code Review for System Architects

Webinar: Code Review for System Architects
by Admin on 11-02-2022 at 11:59 am

* Company email is required*

Register management tools have been used mostly in a bottom-up approach. There are some documents and/or spreadsheets created by the System Architects that are delivered to the design and verification teams. They then start capturing the HW/SW interface of the peripheral IPs in their in-house or

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DATE 2023

DATE 2023
by Admin on 10-19-2022 at 2:29 pm

The DATE conference is the main European event bringing together designers and design automation users, researchers and vendors as well as specialists in the hardware and software design, test and manufacturing of electronic circuits and systems. DATE puts a strong emphasis on both technology and systems, covering ICs/SoCs,… Read More

Webinar: Improving Efficiency and Quality of Verification Environments with Automation

Webinar: Improving Efficiency and Quality of Verification Environments with Automation
by Admin on 09-27-2022 at 9:55 pm

Synopsys Webinar: Tuesday, October 18, 2021 | 10 a.m. Pacific

REGISTER HERE

Bugs can be introduced at any stage in the hardware design development process and escape into tapeout if the verification environment is unqualified. Measuring and improving verification effectiveness to prevent bugs during functional verification

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