Analog Market Leaders Eyeing on IoT Applications

Analog Market Leaders Eyeing on IoT Applications
by Pawan Fangaria on 05-15-2015 at 12:00 pm

When we talk about analog IC market, one can easily guess who the leader with lion’s share in the market is. There are also next level leaders with impressive growth rates in this market. The analog market as such is poised to grow with Internet of Things (IoT) because it supplies some of the key components such as data converters, op… Read More


Can You Really Automate Analog IC Layout?

Can You Really Automate Analog IC Layout?
by Daniel Payne on 04-30-2015 at 7:00 pm

Digital IC design has been largely automated with high-level languages, RTL coding, logic synthesis, and automated place and route tools. What about analog IC layout automation, is it possible? A few EDA companies think that it is possible and even practical. In recent memory there were two companies really focused on analog … Read More


SEMI Wafers to Wallstreet – New England Forum March 12, 2015

SEMI Wafers to Wallstreet – New England Forum March 12, 2015
by Scotten Jones on 04-02-2015 at 4:00 pm

On March 12 SEMI held a New England Forum breakfast event entitled “Wafers to Wallstreet” with four speakers. The main focus of the discussion was on the “Internet of Things” and the following are my impression from the talks in a bullet point format.

Device Scaling and Performance in the Era of IoT – Gary Rosen, Applied MaterialsRead More


Inside tips on Tanner L-Edit toolbox

Inside tips on Tanner L-Edit toolbox
by Don Dingee on 02-02-2015 at 7:00 am

Advanced skill in auto repair, carpentry, plumbing, and similar trades often correlates to one factor. Knowing what you want to do is one thing – having the proper tool is another, and can make the difference. Many a job has extended from minutes to hours over the lack of the right tool at the right moment. Experienced mechanics and… Read More


Methodology Help for Analog IC Designers

Methodology Help for Analog IC Designers
by Daniel Payne on 12-25-2014 at 7:00 am

Digital designers are more numerous than analog IC designers, and so they tend to get more attention from EDA vendors in terms of tools and automation methodologies. For an analog design team with specialists focused separately on schematics and layout there are several methodology questions that need to be addressed, like:… Read More


Coverage Driven Analog Verification

Coverage Driven Analog Verification
by Paul McLellan on 11-25-2014 at 7:00 am

Ad hoc digital design verification approaches ran out of steam at least a decade ago when designs got intractably large to make it feasible to keep track of everything with pen and paper and excel. But analog design has remained largely ad hoc to this day. The designer runs spice, looks at the waveforms that come out and decide whether… Read More


Adding a Digital Block to an Analog Design

Adding a Digital Block to an Analog Design
by Daniel Payne on 10-30-2014 at 7:00 am

My engineering background includes designing at the transistor-level, so I was drawn to attend a webinar today presented by Tanner EDAand Incentia about Adding a Digital Block to an Analog Design. Many of the 30,000 users of Tanner tools have been doing AMS designs, so adding logic synthesis and static timing analysis from IncentiaRead More


Cadence Mixed Signal Technology Forum

Cadence Mixed Signal Technology Forum
by Paul McLellan on 10-29-2014 at 7:00 am

Yesterday was Cadence’s annual mixed-signal technology forum. I think that there was a definite theme running through many of the presentations, namely that wireless communication of one kind or another is on a sharp rise with more and more devices needing to connect to WiFi, Bluetooth and so on. This was most obvious during… Read More


Designing SmartCar ICs

Designing SmartCar ICs
by Daniel Payne on 09-30-2014 at 7:00 am

When I upgraded cars from a 1988 to 1998 Acura it seemed like my car had become much smarter with a security chip in the key, security codes in the radio and a connector for computer diagnosis, however in today’s modern auto there’s a lot more mixed-signal design content. Micronasand Synopsysgot together and hosted … Read More


Analog Model Equivalence Checking Accelerates SoC Verification

Analog Model Equivalence Checking Accelerates SoC Verification
by Pawan Fangaria on 08-09-2014 at 7:30 pm

In the race to reduce verification time for ever growing sizes of SoCs, various techniques are being adopted at different levels in the design chain, functional verification being of utmost priority. In an analog-digital mixed design, which is the case with most of the SoCs, the Spice simulation of analog components is the limiting… Read More