I’ve spent most of my career in the ASIC business. In 2003, Gartner predicted the ASIC market would grow to $16.9B. During that time, there were a number of startups building ASICs, but the applications were a bit specialized and aimed at new markets. Consequently, there was a lot of risk to build a chip startup and many ASICs either… Read More
This blog is my second blog from this year’s Linley Fall Processor Conference. The first two blogs focused on edge inference solutions. Achronix’s discussion was much broader than just AI/ML; it was about where FPGA’s have been going and culminated with a product announcement preview. I’ll get to the announcement in a moment, … Read More
The challenges of 7nm are well documented. Lithography artifacts create exploding design rule complexity, mask costs and cycle time. Noise and crosstalk get harder to deal with, as does timing closure. The types of applications that demand 7nm performance will often introduce HBM memory stacks and 2.5D packaging, and that creates… Read More
One thing I learned while writing the books about TSMC and ARM is that collaboration has always been at the core of both companies. They started with collaboration on day one and it is now a natural part of their business models. And the word collaboration in the fabless semiconductor ecosystem gets redefined at every process node,… Read More
