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Going up! Power and performance issues, along with manufacturing yield issues, limit how much bigger chips can get in two dimensions. That, and the fact that you can’t manufacture two different processes on the same wafer, mean that we are going up into the third dimension.
The simplest way is what is called package-in-package… Read More
3D IC @ #48DACby Daniel Nenni on 05-23-2011 at 4:54 pmCategories: EDA, Events
A three-dimensional integrated circuit (3D IC ) is a chip in which two or more layers of active electronic components are integrated both vertically and horizontally into a single circuit. The semiconductor industry is hotly pursuing this emerging technology in many different forms, as a result the full definition is still somewhat… Read More
Have you ever had the experience where you look up some unusual word in the dictionary since you don’t remember seeing it before. And then, in the next few weeks you keep coming across it. Twice in the last week I have been in presentations about the economics of putting die onto silicon interposers and the possibility of a new… Read More
My vote for most compelling technology at #47DAC is 3D technology. No, I don’t mean Hollywood-style 3D, I’m talking about vertical stacked-die system on chip design. This design approach basically means putting different parts of the system on different silicon substrates, so you can use the right technology for each part, and… Read More