Listening to the Intel earnings call yesterday and then reviewing the transcript last night, I came away with two thoughts that I think are key to understanding where the PC and mobile industry Continue reading “Intel Postgame Q1 2012 Earnings”
Atrenta is having a special offer to let you “spring clean” your IP for free. They are providing two weeks of free access to the Atrenta IP kit starting from today, April 16th, until the end of May. During this period, qualified design groups in the US will be able to use the kit for two consecutive weeks to “spring clean” their third party or internally developed IP blocks at no cost.
Atrenta’s IP Kit is also used by TSMC to quality soft IP for inclusion in the TSMC 9000 IP library. See my blog here. Plus it is TSMC’s technology symposium tomorrow.
The IP Kit generates two important reports: the Atrenta DashBoard and DataSheet.
The Atrenta DashBoard provides a pass/fail status for all IP blocks. It shows the status of the block for key design objectives such as CDC, power, test, timing constraints and more. It also reflects overall readiness of the IP as measured by various quality goals. User-defined success criteria are used to report tolerance to fatals, errors and warnings. Designers are able to drill down to get additional information on the exact violations reported, as well as access trend data that shows overall progress to achieve a passing status over time. A SpyGlass Clean report has no failures reported.
The second report is the Atrenta DataSheet. This report focuses on IP characteristics. Once the DashBoard report is “clean,” the DataSheet acts as a final handoff document that captures key information about the IP block, such as the I/O table, clock trees, reset trees, final power spec, test coverage, constraints coverage and more. Especially useful when a block is being integrated, the report gathers this key information into one easy-to-read HTML document.
And if you really get carried away with the idea of spring cleaning, my condo could do with some attention.
Details on the IP Kit Spring Cleaning promotion is here.
And Atrenta’s geek friend has his own take (1.5 mins):
Just in time for TSMC’s technology symposium (tomorrow) ARM have announced a whole portfolio of new Processor Optimization Packs (POPs) for TSMC 40nm and 28nm. For most people, me included, my first question was ‘What is a POP?’
A POP is three things:
Basically, ARM takes their microprocessors, which are soft cores, and implements them. Since so many of their customers use TSMC as a foundry, the various TSMC processes are obviously among the most important. They examine the critical paths and the cache memories and design special standard cells and other elements to optimally match the processor to the process. They don’t do this just once, they pick a few sensible implementation choices (highest performance 4 core for networking, medium performance dual core for smartphones, lowest power single core for low end devices). A single POP contains all the components necessary for all these different power/performance/area points. Further, although we all casually say things like ‘TSMC 40nm’ in fact TSMC has two or three processes at each node to hit different performance/power points, so they have to do all of this several times.
Then they provide the performance benchmarks that they managed to achieve, along with all the detailed implementation instructions as to how they did it. These are EDA tool chain independent since customers have different methodologies. But the combination of IP and documentation should allow anyone to reproduce their results or get equivalent results with their own implementations after any changes that they have made for their own purposes and to differentiate themselves from their competitors.
Companies using the POPs get noticeably better results than simply using the regular libraries and doing without the specially optimized IP.
About 50% of licensees of the processors for which POPs have been available seem to have licensed them, currently there are 28 companies using them. Here’s a complete list of the POPs (click to enlarge):
Of course ARM has new microprocessors in development (for example, the 64 bit ones already announced) and they are also working closely with foundries at 20nm and 14nm (including FinFETs). So expect that when future microprocessors pop out that a POP will pop out too.
About TSMC
TSMC created the semiconductor Dedicated IC Foundry business model when it was founded in 1987. TSMC served about 470 customers and manufactured more than 8,900 products for various applications covering a variety of computer, communications and consumer electronics market segments. Total capacity of the manufacturing facilities managed by TSMC, including subsidiaries and joint ventures, reached above 9 million 12-inch equivalent wafers in 2015. TSMC operates three advanced 12-inch wafer GIGAFAB™ facilities (fab 12, 14 and 15), four eight-inch wafer fabs (fab 3, 5, 6, and 8), one six-inch wafer fab (fab 2) and two backend fabs (advanced backend fab 1 and 2). TSMC also manages two eight-inch fabs at wholly owned subsidiaries: WaferTech in the United States and TSMC China Company Limited, In addition, TSMC obtains 8-inch wafer capacity from other companies in which the Company has an equity interest.
TSMC’s 2015 total sales revenue reached a new high at US$26.61 billion. TSMC is headquartered in the Hsinchu Science Park, Taiwan, and has account management and engineering service offices in China, Europe, India, Japan, North America, and, South Korea.
As I write this I sit heavyhearted in the EVA executive lounge returning from my 69[SUP]th[/SUP] trip to Taiwan. I go every month or so, you do the math. This trip was very disappointing as I can now confirm that just about everything you have read about TSMC 28nm yield is absolutely MANURE!
Continue reading “The Truth of TSMC 28nm Yield!”
As many analysts have noted, it is difficult to imagine what Intel’s foundry business will look like one, two or even three years down the road because this is all new and what leading fabless player would place their well being in the hands of one who is totally new at the game. I would like to suggest there is a strategy in place that will soon lead to tectonic shifts in the semiconductor world. The assembled pieces of “no-name” startup chip companies building in Intel’s advanced 22nm trigate process include Achronix, Tabula and now Netronome. Each represent three possible solutions to high performance data path processing that may lead to Intel’s goal of dominance in the combined server, storage, networking platform. Or, perhaps they may serve as a forcing function for leading Altera, Xilinx, Broadcom, Marvell or Cavium away from TSMC and partnering with Intel. Either outcome is a win for Intel.
For much the past three years the spotlight has shined brightly on everything that is mobile – as it should have. Questions about Intel’s ability to either counter Apple’s ARM based mobile rise or to be its eventual supplier across the board will be on every analysts mind until there is resolution. However, there is another side to Intel’s business that is not well understood. Intel always fights a multi-front war to maximize its advantage and overwhelm competitors without similar magnitudes of resources. Only Intel, historically, has been able to do this.
Today, while it charges ahead with its Medfield processor in the smartphone and tablet space to blunt ARM’s early lead, Intel enters a mopping up phase in the PC market with its Ivy Bridge based Ultrabooks that will neuter AMD and nVidia in what will be the highest volume segment by the end of 2013. And in the background Intel has opened up a third front against the foundries of TSMC, Global Foundries and Samsung who the ARM Camp depends on to win the Mobile Tsunami Marketplace. Without a process within spitting distance of Intel, ARM would be relegated to trailing edge embedded SOCs. Therefore Intel will leverage its Fabs to peel away Foundry customers, cutting off oxygen that pays for future capital expenditures at leading nodes.
The announcements that FPGA startups Achronix and Tabula are utilizing Intel’s 22nm process technology had some guessing where were Xilinx and Altera. With Netronome, the question could be where is Cavium and the Netlogic RMI group acquired by Broadcom. All attack the data processing path that Intel needs to fill out the networking platform. The acquisition of Fulcrum last summer and QLogic’s Infiniband group provide critical functions that should be able to leverage 22nm at the expense of Broadcom and Marvell’s switch chips and Mellanox Infiniband chips.
As Andy Bechtolsheim, the former Sun founder and Google investor and now running Arista, a startup building low-latency high performance switches, said the era of ASIC based switch chips is over. The inevitable march towards merchant Ethernet silicon is on and who can build the fastest chips accessing the latest technologies wins. The Fulcrum acquisition seems to preclude Broadcom and Marvell from a Foundry slot unless they were to sign away product rights.
Traction by Achronix or Tabula could force Xilinx or Altera to seek an entry into the 22nm trigate process. Until now, both Xilinx and Altera have walled off the FPGA market to startups with their software tools, leading edge processes and robust IP. However what happens if a startup competitor gets a 3-year process technology advantage. In 2009, Altera beat Xilinx out the door by 12 months with its high end 40nm Stratix IV and ended up crushing them in the communications space, a segment that represents almost half the revenue and the majority of the profits. You have to wonder if there is any reason that they aren’t both running test wafers at Intel.
Diminishing nVidia and AMD’s stature in the PC and tablet business; pulling away a Xilinx or Altera; outrunning Broadcom and Marvell in the switch chip market all seem to be part of an overriding strategy that has yet to be communicated by Intel but is a factor in their massive capital expenditure that looks to double capacity by the end of 2013 and put some distance between them and the Foundries. If Intel out executes on the process side, then many fabless vendors may be presented with a Fait Accompli.
FULL DISCLOSURE: I am long INTC, AAPL, ALTR, QCOM
Interesting article from Joel Hruska on ExtremeTech: Nvidia deeply unhappy with TSMC, claims 22nm essentially worthless . The title is a bit dramatic (poetic license) but the charts are accurate to the degree that 20nm costs will be significantly higher from the start and will continue to be higher throughout production and maturity.
One reason is double patterning, which is required at 20nm (double patterning splits a design into separate masks when devices are too close together). If 28nm masks cost $3M, 20nm masks will cost $5M or more. Another reason is design complexity: layout dependent effects (LDE) and process variation will get worse at 20nm, simulation and verification requirements will explode, and the list goes on…
Life in the semiconductor ecosystem certainly gets more complicated when you try and cram 30B+ planar transistors on one chip, absolutely!
There is no doubt in my mind that these slides are authentic. NVIDIA CEO Jen-Hsun is quite the showman and has a reputation for this kind of public grandstanding. I was a little surprised that NVIDIA used some sort of “normalized” $$$/transistor as a key metric, rather than more traditional semiconductor scaling measures, but perhaps that’s part of their internal business model.
One thing you must know, Jen-Hsun Huang and Morris Chang are VERY close, so you have to play a game of chess here and ask yourself what the agenda really is. A public whipping such as that? Openly criticizing your good friend and founding business partner?
Check out this video at the Silicon Valley Computer Museum, Jen-Hsun interviews Morris, it starts at 8:30 minutes in:
This video will give you a good understanding of the relationship between Jen-Hsun and Morris. It also provides a candid view of Jen-Hsun’s personality, which seems somewhat narcissistic to me.
This topic is certainly timely since the annual TSMC 2012 Technical Symposiumwill take place on April 17[SUP]th[/SUP] at the San Jose Convention Center. Trust me, you’re not going to want to miss this one!
Join the 18th annual TSMC Technology Symposium and get first-hand updates on TSMC’s advanced and specialty technologies, advanced backend capabilities and future development plans!!
To me this is a simple case of wafer pricing negotiations gone wild. Since TSMC is in such a dominant position at 28nm and 20nm the industry is telling them, in the Year of the Dragon, to be more like a teddy bear and collaborate on pricing in the same way they collaborate on technology.
But it’s ridiculous for any fabless semiconductor company to say that they will not aggressively transition to the coming process nodes (20nm and 14nm)! I remember back in the day buying an AMD 40MHZ based PC versus an Intel 36MHZ. Seriously, did I really need that extra 4MHZ? Did I pay extra for it? Of course!
At AMD’s Financial Analyst Day, CEO Rory Read made a point of saying that the company no longer intends to aggressively transition to new process nodes given the diminishing marginal returns from doing so.…….
Okay, let me clarify, any leading edge fabless semiconductor company that wants to STAY in business will aggressively transition to the coming semiconductor nodes, absolutely. Just my opinion of course.
Once again industry professionals get duped! Tabloid journalism runs amok inside the semiconductor ecosystem! As if our industry does not face enough challenges, why are we wasting time on drivel like this? This is a TSMC 28nm wafer by the way and thousands of them are being shipped around the world, believe it.
Continue reading “TSMC absolutely did NOT halt 28nm production!”
Last May, Atrenta and TSMC announced the Soft-IP Alliance Program which uses SpyGlass and a subset of its GuideWare reference methodology to implement TSMC’s IP quality assessment program. TSMC requires all soft-IP providers to reach a minimum level of completeness before their IP is listed on TSMC online. Since TSMC is so dominant in the foundry business right now (Global struggling with process, Intel talking the talk but not yet really walking the walk, UMC…whatever happened to them anyway?) getting approved and listed with TSMC is extremely important.
Atrenta put everything needed to meet TSMC’s requirements in an IP Handoff Kit. Under the hood this uses SpyGlass’s RTL analysis suite to check for syntax and semantic correctness, simulation-synthesis mismatches, connectivity rules, clock domain crossings, test coverage, timing constraints and…lots more.
Suk Lee of TSMC (my successor at running IC marketing when we were both at Cadence) sees this as measurably improving IP quality. Of course TSMC isn’t directly responsible for IP quality but if IP fails and chips don’t go into production TSMC don’t make any money. Anyway, ten companies have now jumped through all the hoops and qualified their IP for inclusion in the TSMC 9000 IP library.
The companies in this initial program are a veritable who’s who of the IP world (with the notable exceptions of ARM and Synopsys). In alphabetical order so as not to offend anyone:
Now that the dominant way to build an SoC is through assembling IP, the issue of IP quality is is a huge problem and a mixture of tools, methodologies, standards and certification is for sure the way to address it.
Yield, no topic is more important to the semiconductor ecosystem. After spending a significant part of my career on Design for Manufacturability (DFM) and Design for Yield (DFY), I’m seriously offended when semiconductor professionals make false and misleading statements that negatively affects the industry that supports us.
Continue reading “TSMC 28nm Yield Explained!”
Humor can arise in surprising ways and yet still be disguised to many. As I was researching Qualcomm the other day, I came upon the transcript of their last quarterly earnings and I had to laugh. In the midst of last summer’s European crises, when the Club Med (Greece, Italy, Spain and Portugal) Sovereign Debt was trying to be rolled over with few takers and stocks swooned across the globe, there was Qualcomm injecting a little humor into the markets. You see, in the midst of everyone selling, did a very bullish thing: they sold over $500M of PUTS and collected $75M doing so. At the last earnings call, none of the analysts inquired. Why does a company with $21B in the bank sell PUTS to earn $75M? The answer, I believe has to do with Qualcomm looking to raise its profile even further as they separate themselves from the rest of the mobile ARM camp. However, 2012 will require an even bigger bet the company move.
Throughout the 1990s, Alan Greenspan, disciple of Ayn Rand, and perhaps the most knowledgeable person on the planet in terms of the gives and takes of the economy liked to befuddle congress with presentations that were incomprehensible with the result being that he had great degrees of freedom in pursuing a monetary policy that he believed generated optimum economic growth with low inflation and a stock market that for the most part headed north. An economy, though is a complex thing and even though he thought he could calibrate the health and dynamism by monitoring things like weekly cardboard box production, outside forces could take the stock market down (e.g. the Asian Crises in 1997 and LTCM in 1998). When a crises occurred he would swing into action by implementing what became known as “The Greenspan PUT”. The Fed would immediately lower interest rates and stocks would head higher to the cheers of the investment class. The PUT has limitations, as is seen in our current crises, when debt loads get too large.
Qualcomm’s PUT, in the midst of the European crises was a signal to Wall St. that they believe very good times lie ahead regardless of whether Italy, Greece, France or the whole EU goes in the tank. Although market indications lately show that Europeans will forsake everything to get their hands on an Apple iPAD and iPhone. Perhaps even Italian three hour lunches. Not to worry the money printing has already begun. So, Qualcomm’s selling of PUTS in Q3 was a bullish signal that at the time of expiration in 2H 2012, the stock will be higher than the strike price (I am guessing between $45 and $50 as Qualcomm’s stock flirted with a low of $46). Qualcomm said the breakeven price of the PUT option is roughly $43 a share. Below that they have to write a check to buy the stock back.
Qualcomm’s $21B stash of cash is greater than Intel’s and will soon be three times that of nVidia, Broadcom and Marvell combined who make up the ARM camp that not only are Qualcomm’s chief competitors but licensees. Qualcomm stands as a tall Redwood in a forest of seedlings as it is more than an order of magnitude larger in sales than any of the current ARM campers. But there are major business decisions coming down the pike.
Qualcomm, along with Intel and Apple have the most direct impact on the shaping of the smartphone, tablet, ultrabook mobile Tsunami marketplace and yet each impact it differently. Intel is driving ultrabook to be the form factor that separates them from nVidia and AMD giving them a de-facto Monopoly position in the PC space while also pursuing Apple for the iPhone and iPAD processor business. Apple, we know owns the iTunes Walled Garden Ecosystem that gives them the upper hand in selecting from a cornucopia of suppliers for its next products. You can say that Qualcomm is the winner no matter what communications solution is chosen – whether it is its own chipset or a royalty bearing solution from Broadcom, Intel, Marvell and others. However the big money is in supplying the chips and that can be a problem or opportunity.
As mentioned in previous blogs, the economics of Mobile Tsunami are different than the PC market. Apple and Samsung continue to go Vertical in their supply chain to remove excessive margins. In return for a capital investment and guaranteed demand, Apple gets vendors to drop ASPs and margins. Intel is approaching Apple with a production model that can retain its standard 50-60% Gross Margins but ASPs lower than Samsung due to their 2-3 year process lead. Qualcomm on the other hand sells chips that include the TSMC margin on top of their own 60%+ gross margin.
Bottom line: Does Qualcomm use its $21B cash to build a fab to eliminate TSMC margins and build next generation communications chips that aren’t available elsewhere? Do they approach Intel to Fab next generation standalone chips while offering Intel first rights on “volume integrated communications.” I don’t see Qualcomm moving to a complete IP model. However, the maturation of the very high volume mobile market combined with the economics suggest that the winners will either own Fabs or be IP Houses and a shakeout will take place among the Fabless. There is room for one profit margin, not two – unless you build at Intel. 2012 could be a very decisive year for Qualcomm.
FULL DISCLOSURE: I am Long AAPL, INTC, ALTR, QCOM.
