At Mentor’s U2U this afternoon I attended a presentation on TSMC’s use of Calibre PERC (it is a programmable electrical rule checker) for qualification of IP in TSMC’s IP9000 program. I’ve written about this before here. Basically IP providers at N20SOC, N16FF, and below are required to use PERC to guarantee… Read More




GSA 3DIC
At the GSA Silicon Summit this afternoon there was a discussion of 3D IC and 2.5D IC. The session was moderated by Javier DeLaCruz of eSilicon and the panelists were:
- Calvin Cheung of ASE (an OSAT)
- Gil Lvey of OptimalTest (a test house)
- Bob Patti of Tezzaron (semiconductor company specializing in TSV-based designs)
- Riko Radojcic
Advancements in Nanoscale Manufacturing
I’m at the GSA Silicon Summit today, at the computer history museum. The first panel session this morning was about future process technology. It was moderated by Joe Sawicki of Mentor with a panel consisting of Rob Aitken from ARM, Paul Farrar of G450C, Peter Huang of TSMC, John Kibarian of PDF Solutions and someone from Applied… Read More
Death to ‘content marketing’
If you ask me: Are you blogging for Semiwiki? The real answer could be:
No, I am just telling stories, but these are true stories! This idea is perfectly illustrated by this post that I found on:
http://www.pivotalpod.com/death-to-content-marketing/
And in particular this extract, as it is something that I could have written … Read More
Mentor’s New Enterprise Verification Platform
I spent the morning at Mentor where they announced their new enterprise verification platform. This was a general announcement but was attended by a lot of the international press who were over on a GlobalPress tour (the event that used to take up camp at Chaminade).
But first Wally Rhines spent 30 minutes giving a nice overview of… Read More
FD-SOI, FinFET, 3D in Monterey
Last night the IEEE Silicon Valley Chapter had a panel session that was in some ways a preview of some of what will be discussed at the Electronic Design Process Symposium in Monterey next Thursday and Friday. At EDPS Herb Reiter organized a session on FinFET, 3DIC and FD-SOI (sort of how many buzzwords can you get into one set of titles).… Read More
Addressing MCU Mixed Signal Design Challenges
The emerging market for IoT and wearable devices are designed with mixed-signal IP that includes: embedded CPU, flash, analogue and radio.EDA and IP companies have recently worked together to allow us to design an MCU with mixed-signal IP blocks more efficiently. This morning I attended a webinar with presenters from ARMand … Read More
How Qualcomm crushed the mobile roadmap
Qualcomm’s Snapdragon 810 announcement this week may seem like just another mondo-core SoC on a way-cool TSMC 20nm advanced process. Looking past the technology shows an understated genius in creating a roadmap – and why yours and most everyone else’s probably sucks.… Read More
IP Reuse and Management in Monterey!
One of the benefits of being part of SemiWiki is building relationships with a wide variety of companies covering every semiconductor design application imaginable. We are blessed, absolutely. Another benefit of being part of SemiWiki are the invitations to attend, participate, and even organize events such as EDPS. Last year… Read More
Who Wants to Live in Malta?
Who wants to live in Malta? A beautiful island in the eastern Mediterranean with wonderful food…wait, that’s the wrong Malta. I’m talking about the one in upstate New York where GlobalFoundries have their big fab 8 and also their technology development center (also known as fab 8.1).
So why would you want to … Read More
Should the US Government Invest in Intel?