Efficient Bump and TSV Planning for Multi-Die Chip DesignsThe semiconductor industry has experienced rapid advancements in…Read More
The Evolution of RISC-V and the Role of Andes Technology in Building a Global EcosystemDuring my frequent trips to Taiwan as a…Read More
Capability Hardware Enhanced RISC Instructions CHERI AllianceThe CHERI Alliance is a non-profit organization dedicated…Read More
Operationalizing Secure Semiconductor Collaboration: Safely, Globally, and at ScaleSemiconductor manufacturing is among the most complex industrial…Read More
Keynote: On-Package Chiplet Innovations with UCIeIn the rapidly evolving landscape of semiconductor technology,…Read More
IEDM (technically the International Electron Devices Meeting although I’ve never heard anyone use the full name) is in a couple of weeks time, in San Francisco. It is December 15-17th at the Hilton Union Square (which is not actually at Union Square but nearby at 333 O’Farrell Street).
For the last few years on the Tuesday… Read More
Judging from the presentation Hermann Eul did at NASDAQ this week Intel is still in mobile. This presentation was probably inked before Intel Mobile was folded into the PC Group however. The first clue is Hermann’s title was listed as “General Manager and Vice President, Mobile Communications Group” which he is no longer. Even … Read More
As exciting as the Internet of Things (IoT) is, the question of how and which companies stand to make money in this market remains. From previous waves of internet markets we have seen surprising wins and epic loses. How is the IoT market shaping up? And what are the real business drivers? According to a Silicon Valley Bank analysis… Read More
It looks like even President Obama is on the IoT bandwagon now with his $263M in matching funds for state and local police body cameras and training. It is a shame that it took a tragic event to spur this type of Government investment in semiconductor technology but I appreciate it just the same.
As I have mentioned before, when I read… Read More
In today’s world, the three pillars of security are confidentiality, integrity (of the data), and authentication (i.e. “C.I.A.”). Fortunately, Atmel CryptoAuthentication crypto engines with secure key storage can be used in systems to provide all three of these.
Focusing on the confidentiality pillar, in a symmetric system… Read More
I am a believer of continuous improvement in anything we do; it’s pleasant to see rapid innovation in technology these days, especially in semiconductor space – technology, design, tools, methodologies… Imagine a 100K gates up to 1M gates design running at a few hundred MHz frequency and at technology node in the range of .18 to … Read More
The traditional batch-oriented DRC process run as a final check to ensure compliance with foundry yield goals is quickly moving toward a concurrent DRC process performed early and often throughout design, especially at the 28 nm and smaller process nodes. What are the technology factors causing this change?
I’m an exercise junkie. I’m also not a spring chicken so I like having the time on my wrist. I’ve been anxiously awaiting an iWatch to go with my iPhone 6. As patience is not a virtue of mine, and the iWatch is rumored to be expensive ($400-500). I decided to try a fitness watch.
This is a crowded area that includes activity… Read More
Every year in December is what I think of as the main 3D IC conference where you can get up to speed on all the latest. Officially it is called 3D Architectures for Semiconductor and Packaging or 3D ASIP. It is held in the Hyatt Regency in Burlingame (the one right by 101 near the airport). This year it is from December 10-12th.
The first… Read More
SerDes stands for Serializer/Deserializer, and SerDes is a serious piece of design, requiring an extremely experienced team of analog engineers (below 10 years’ experience, you’re still a quasi-beginner). Better to rely on an analog guru to draw the SerDes architecture and manage the team! Why does SerDes is becoming more and… Read More
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Unraveling Dose Reduction in Metal Oxide Resists via Post-Exposure Bake Environment