Once upon a time, RAM technology was the driver of the semiconductor process. DRAM products were the first to be designed on a newest technology node and DRAM was used as a process driver. It was 30 years ago and the most aggressive process nodes were ranging between 1um and 1.5 um (1 500 nm!). Then in the 1990 the Synchronous Dynamic … Read More





Tackling Layout Gradient Effects in 16 nm FinFET using Layout Automation
My first exposure to automating IC layout was back in the 1980’s at Intel where I coded a layout compiler to auto-generate about 6% of a graphics processor chip. The need to use automation for IC layout continues today, and with the advent of FinFET technology there are some new challenges like layout gradient effects that … Read More
The New York Times Announces 7nm
Everyone is somewhat focused on the march of process nodes. Moore’s Law, although I think that with the breach between technology and cost that may be changing. Moore’s Law was about the lowest cost way to get a given number of transistors manufactured. But now the lowest cost and the highest density are diverging. … Read More
After Five Years, 28nm Future Remains Bright!
Five years ago TSMC started 28nm mass production and it went on to become one of the most versatile and successful process technologies in history. The first wave was triggered by an unprecedented demand for application processors from smartphone and tablet vendors. Today it’s widely assumed that 28nm demand will continue growing… Read More
Updates for Effective Collaboration
Managing any design data management system requires a policy on how often users should be submitting their changes to the central repository. If users commit frequently with less local testing then other users will more likely see errors. If commits are done less often, but with better testing, then other users are protected from… Read More
Power Management Gets Tricky in IP Driven World
Today, an SoC can have multiple instances of an IP and also instances of many different IPs from different vendors. Every instance of an IP can work in a separate mode and requires a dedicated power arrangement which may only be formalized at the implementation stage. The power intent, if specified earlier, will need to be re-generated… Read More
3 Key Frontiers for Samsung’s Next Mobile SoC
Samsung’s Exynos 7420 system-on-chip (SoC) is now at the top of the world when it comes to performance and power efficiency benchmarks. It’s also won accolades as the first mobile chipset manufactured using the 14nm FinFET fabrication process.
However, the mobile chipsets landscape is hypercompetitive, and there… Read More
Circuit Simulation Update from #52DAC
Actual users of circuit simulators told their design and simulation stories at DAC during a luncheon sponsored by Synopsys on June 8th. I always prefer to hear from a design engineer versus a marketing person about what tool they use for circuit simulation, and how it helps them analyze their design goals. This year there were engineers… Read More
Xilinx Datacenter on a Chip
I talked recently about the Intel acquisition of Altera which seems to be all about using FPGA technology to build custom accelerators for the datacenter. Some algorithms, especially in search, vision, video and so on map much better onto a hardware fabric than being implemented in code on a regular microprocessor.
So if the heart… Read More
Why Automotive IP Portfolio is not just IP
Synopsys is launching a broad IP portfolio to support SoC development dedicated to emerging automotive complexes functions, like Driver Assistance (ADAS), Driver Information, Vehicle Network or Infotainment. I was never involved into IC design for Automotive, but I have designed ASIC for avionics (CFM56 motor control) or… Read More
MediaTek Develops Chip Utilizing TSMC’s 2nm Process, Achieving Milestones in Performance and Power Efficiency