Primarius 2B

Podcast EP185: DRAM Scaling, From Atoms to Circuits with Synopsys’ Dr. Victor Moroz

Podcast EP185: DRAM Scaling, From Atoms to Circuits with Synopsys’ Dr. Victor Moroz
by Daniel Nenni on 09-29-2023 at 10:00 am

Dan is joined by Dr. Victor Moroz, a Synopsys Fellow engaged in a variety of projects on leading edge modeling Design-Technology Co-Optimization. He has published more than 100 technical papers and over 300 US and international patents. Victor has been involved in many technical committees and is currently serving as an Editor… Read More


CEO Interview: Stephen Rothrock of ATREG

CEO Interview: Stephen Rothrock of ATREG
by Daniel Nenni on 09-29-2023 at 6:00 am

Stephen Rothrock ATREG

Stephen Rothrock founded ATREG in 2000 to help global advanced technology companies divest and acquire infrastructure-rich manufacturing assets. Over the last 25 years, his firm has completed more than 100 transactions, representing over 40% of all global operational wafer fab sales in the semiconductor industry for operational,… Read More


AI for the design of Custom, Analog Mixed-Signal ICs

AI for the design of Custom, Analog Mixed-Signal ICs
by Daniel Payne on 09-28-2023 at 10:00 am

high sigma verifier min

Custom and  Analog-Mixed Signal (AMS) IC design are used when the highest performance is required, and using digital standard cells just won’t meet the requirements. Manually sizing schematics, doing IC layout, extracting parasitics, then measuring the performance only to go back and continue iterating is a long, tedious… Read More


Keysight EDA 2024 Delivers Shift Left for Chiplet and PDK Workflows

Keysight EDA 2024 Delivers Shift Left for Chiplet and PDK Workflows
by Don Dingee on 09-28-2023 at 8:00 am

Chiplet PHY Designer

Much of the recent Keysight EDA 2024 announcement focuses on high-speed digital (HSD) and RF EDA features for Advanced Design System (ADS) and SystemVue users, including RF System Explorer, DPD Explorer (for digital pre-distortion), and design elements for 5G NTN, DVB-S2X, and satcom phased array applications. Two important… Read More


Assertion Synthesis Through LLM. Innovation in Verification

Assertion Synthesis Through LLM. Innovation in Verification
by Bernard Murphy on 09-28-2023 at 6:00 am

Innovation New

Assertion based verification is a very productive way to catch bugs, however assertions are hard enough to write that assertion-based coverage is not as extensive as it could be. Is there a way to simplify developing assertions to aid in increasing that coverage? Paul Cunningham (Senior VP/GM, Verification at Cadence), Raúl … Read More


Podcast EP184: The History and Industry-Wide Impact of TSMC OIP with Dan Kochpatcharin

Podcast EP184: The History and Industry-Wide Impact of TSMC OIP with Dan Kochpatcharin
by Daniel Nenni on 09-27-2023 at 2:00 pm

Dan is joined by Dan Kochpatcharin, Dan joined TSMC in 2007. Prior to his current role heading up the Design Infrastructure Management Division, Dan led the Japan customer strategy team, the technical marketing and support team for the EMEA region in Amsterdam and was a part of the team leading the formation of the TSMC Open Innovation… Read More


Version Control, Data and Tool Integration, Collaboration

Version Control, Data and Tool Integration, Collaboration
by Daniel Payne on 09-27-2023 at 10:00 am

SoC Complexity min

As a follow up from my #60DAC visit with Simon Rance of Keysight I was invited to their recent webinar, Unveiling the Secrets to Proper Version Control, Seamless Data and Tool Integration, and Effective Collaboration. Karim Khalfan, Director of Solutions Engineering, Data & IP Management was the webinar presenter.

Modern… Read More


WEBINAR: Emulation and Prototyping in the age of AI

WEBINAR: Emulation and Prototyping in the age of AI
by Daniel Nenni on 09-27-2023 at 8:00 am

mimic 128

Artificial Intelligence is now the primary driver of leading edge semiconductor technology and that means performance is at a premium and time to market will be measured in billions of dollars of revenue. Emulation and Prototyping have never been more important and we are seeing some amazing technology breakthroughs including… Read More


Power Supply Induced Jitter on Clocks: Risks, Mitigation, and the Importance of Accurate Verification

Power Supply Induced Jitter on Clocks: Risks, Mitigation, and the Importance of Accurate Verification
by Daniel Nenni on 09-27-2023 at 6:00 am

Jitter Analysis

In the realm of digital systems, clocks play a crucial role in synchronizing various components and ensuring smooth flow of logic propagation. However, the accuracy of clocks can be significantly affected by power supply induced jitter. Jitter refers to the deviation in the timing of clock signals with PDN noise compared to ideal… Read More


Fast Path to Baby Llama BringUp at the Edge

Fast Path to Baby Llama BringUp at the Edge
by Bernard Murphy on 09-26-2023 at 10:00 am

Baby Llama min

Tis the season for transformer-centric articles apparently – this is my third within a month. Clearly this is a domain with both great opportunities and challenges: extending large language model (LLM) potential to new edge products and revenue opportunities, with unbounded applications and volumes yet challenges in meeting… Read More