Streamlining Functional Verification for Multi-Die and Chiplet DesignsAs multi-die and chiplet-based system designs become more…Read More
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What XiangShan Got Right—And What It Didn’t Dare TryAn Open ISA, a Closed Mindset — Predictive…Read More
(With apologies to Pogo.) For all the great work that we are seeing in improving both software and hardware security, we – not the technology – are in many ways the weakest link in the security chain. Recent reports indicate we are surprisingly easy to fool, despite our much proclaimed awareness of risks.
In a recent experiment at … Read More
Some of the various MIPI specifications are now massively used in mobile (smartphone or tablet), especially the Multimedia related specs like Camera Serial Interface (CSI-2), Display Serial Interface (DSI) and D-PHY. You have to implement with CSI-2 or DSI controller a serial based physical interface, D-PHY specified up to… Read More
On the first two chapters of this Tutorial we started with a simple LFSR module and added a test bench. Then, on chapters three and four we upgraded our module with some features and learned to export the test bench data to files.
… Read More
In the first part of this tutorialwe started with a simple implementation of an LFSR block (Chapter 1) and its test bench (Chapter 2). Let’s make our code look a bit more professional.
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In this tutorial we will see how to design a VHDL block. We will start with a very simple block and we will gradually add features to it. We will also simulate it and test its output with Matlab. Over the process we will see:
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The leading edge semiconductor logic landscape has in recent years collapsed to just four companies. The following is a summary of what is currently known about each company’s plans and how they compare. ASML has analyzed many logic nodes and developed a formula that normalizes processes to a “standard node”.… Read More
18 months ago Renesas announced they were prototyping their SG-MONOS eFlash on 28nm, and at the time we said it would be a couple of years before actual product. Yesterday, Renesas revealed their partner in this effort is TSMC – no surprise – and hinted things are moving, with better performance than expected but on a longer qualification… Read More
DVCon is an annual Design and Verification Conference that started out in Silicon Valley, then expanded by adding India as a new location. Our semiconductor design and verification world is global in stature, so if you’re living in the region then consider registering for this event held Thursday and Friday, September … Read More
In the early days of integrated components, we used to think kHz (~10[SUP]3[/SUP]Hz) processing was pretty wild. Those systems were quickly eclipsed by MHz (~10[SUP]6[/SUP]Hz) performers and now we’re blasé about GHz (~10[SUP]9[/SUP]Hz) speeds. Recently (2014), DARPA announced a THz (~10[SUP]12[/SUP]Hz) amplifier, built… Read More
It only seems fitting that Fab 12 is a PokeStop since TSMC stands to make a lot of money from the augmented reality gaming craze that is sweeping the world. Unfortunately, most of the press I have read about Pokemon Go has been negative but that is the new “negative media” world we live in. As a player myself (level 25) and a semiconductor… Read More
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Should the US Government Invest in Intel?