5G, the planned successor to earlier mobile network standards, holds all kinds of promise for new capabilities beyond LTE, but for a while seemed stuck in debate on exactly what the standard should cover. Several problems are apparent. A path to higher bit-rates is complicated because of spectrum shortage and fragmentation (plans… Read More




Shootout at 22nm!
For an industry that drives improvement at an exponential rate it is funny how often something old is new again. Intel went into high volume production on 22nm in 2011, and TSMC and Samsung have both had 20nm technologies in production for several years. And yet, recently we have seen renewed interest in 22nm. GLOBALFOUNDRIES has… Read More
Apple Going (IP) Vertical with no Imagination!
What conclusion could we derive from the recent (April 3) PR from Imagination where we learn that the company “has been notified by Apple Inc. (“Apple”), its largest customer, that Apple is of a view that it will no longer use the Group’s intellectual property in its new products in 15 months to two years time, and as such will not be … Read More
CEO Interview: Sanjay Keswani of Consensia
Sanjay Keswani founded Consensia in 2013. He has deep experience in the high-tech industry, guiding some of the world’s high profile technology brands through complex innovation and business transformation projects including companies such as Atmel, KLA-Tencor, Hughes Aircraft, and Motorola Mobility. Consensia customers… Read More
Everything a Designer Wants to Ask About FDSOI
So you’ve got questions about FD-SOI? For chip designers in Silicon Valley, there’s a great opportunity to get answers from some of the world’s leading design experts. It’s coming up fast: April 14th, the SOI Consortium is organizing a full day of FDSOI tutorials for chip designers. Bear in mind that … Read More
Caution: Reset Domains Crossing
Because you can never have too much to worry about in verification, reset domain crossings (RDCs) are another hazard lying in wait to derail your design. Which hardly seems fair. We like to think of resets as dependable anchors to get us back on track when all else fails, but it seems their dependability is not absolute, especially… Read More
Webinar: Top Five Challenges Preventing Design Closure!
According to a recent engineering survey, completing IC designs on time and within specifications gets exponentially more challenging with each node. Why? Here are the top five reasons:… Read More
Lowering Costs for Custom SoC Development – ARM and Tanner EDA
Cost is a major barrier when an electronic design company starts to consider developing a custom SoC for a particular market segment. But what if there was a way to lower the development cost, or even get to an SoC proof of concept for no cost except of course for your engineering expenses? That value proposition caught my attention… Read More
SNUG and Robots
I got an invite to the SNUG (Synopsys User Group meeting) keynotes this year. I could only make it to the second keynote but what a treat that was. The speaker was Dr. Peter Stone, professor and chair of CS at UT Austin. He also chaired the inaugural panel for the Stanford 100-year study on AI. This is a guy who knows more about AI than most… Read More
Cadence Expands Integrated Photonics Beachhead
In November of 2016, I made a bold statement that October 20, 2016 would stand as a watershed day in integrated photonics. The reason for this claim was that GLOBALFOUNDRIES proclaimed that integrated photonics was real and here to stay. The same week I wrote an article about Cadence Design Systems securing a photonic beachhead … Read More
Should the US Government Invest in Intel?