



IEDM 2025 – TSMC 2nm Process Disclosure – How Does it Measure Up?
Initial thoughts
At IEDM held in December 2024, TSMC presented: “2nm Platform Technology featuring Energy-efficient Nanosheet Transistors and Interconnects co-optimized with 3DIC for AI, HPC and Mobile SoC Applications,” the authors are:
Geoffrey Yeap, S.S. Lin, H.L. Shang, H.C. Lin, Y.C. Peng, M. Wang, PW Wang, CP Lin, KF… Read More
Podcast EP273: An Overview of the RISC-V Market and CAST’s unique Abilities to Grow the Market with Evan Price
Dan is joined by Evan Price, Product Manager for embedded processors at CAST. Evan has had a diverse and successful 15-year career developing, then leading as project manager and director, with a variety of semiconductor-based products. Evan joined CAST in 2024 and provides technical support as well as handling product marketing… Read More
CEO Interview: Mouna Elkhatib of AONDevices
Mouna Elkhatib is the CEO, CTO, and Co-Founder of AONDevices, Inc., a leading provider of super-low-power Edge AI solutions. A visionary entrepreneur and innovative leader, Mouna has successfully grown AONDevices into a recognized leader in the Edge AI space. With over 20 years of experience in semiconductor technology, she… Read More
Resist Loss Model for the EUV Stochastic Defectivity Cliffs
The occurrences of notorious stochastic defects in EUV lithography have resulted in CD or corresponding dose windows with the lower and higher bounds being characterized as “cliffs” [1-3], since the defect density increases exponentially when approaching these bounds. The defects at lower doses have been attributed to the… Read More
2025 Outlook with Volker Politz of Semidynamics
Tell us a little bit about yourself and your company.
I am the Chief Sales Officer and I lead the global sales team and drive the overall sales process.
Semidynamics was founded 2016 as a design service company with a focus on RISC-V. This was so successful that the CEO decided to pivot the company towards its own IP sales and started… Read More
Video EP1: A Discussion of Meeting the Challenges to Implement Gen AI in Semiconductor Design with Vishal Moondhra
In this inaugural episode of the new Semiconductor Insiders video series, Dan is joined by Vishal Moondhra, VP of Solutions Engineering at Perforce Helix IPLM. Dan explores the risks and challenges of using Gen AI in the semiconductor industry with Vishal. Liability, traceability, cost, and quality are discussed. The challenges… Read More
KLAC Good QTR with AI and HBM drive leading edge and China is Okay
– KLA put up a good qtr & year with consistent growth
– AI & HBM are the main drivers of leading edge which helps KLA
– China slowing but not too fast, Outlook OK but not super
– Wafer inspection is huge but reticle inspection continues to slip
KLA reports good quarter and OK outlook
KLA reported revenues… Read More
Getting Faster DRC Results with a New Approach
As IC designs become increasingly complex, traditional Design Rule Checking (DRC) methods are struggling to keep up. The old “construct by correction” approach, initially developed for simpler, custom layouts, is creating substantial runtime and resource bottlenecks. Traditional DRC relies on an iterative, sequential… Read More
2025 Outlook with Uzi Baruch of proteanTecs
Tell us a little bit about yourself and your company.
I am the Chief Strategy Officer at proteanTecs where I oversee our organic and inorganic growth strategies, as well as our go-to-market. This includes collaboration with ecosystem partners, defining our business model, and creating value for our customers through a targeted… Read More
Unlocking the cloud: A new era for post-tapeout flow for semiconductor manufacturing