In the 1930s, psychologist B.F. Skinner put rats in boxes and taught them to push levers to receive a food pellet. The pushed the levers only when hungry, though. To get the rats to press the lever repeatedly, even when they did not need food, he gave them a pellet only some of the time, a concept now known as intermittent variable rewards.… Read More
WEBINAR: Revolutionizing Electrical Verification in IC DesignIn the complex world of IC design, electrical…Read More
Hierarchically defining bump and pin regions overcomes 3D IC complexityBy Todd Burkholder and Per Viklund, Siemens EDA…Read More
CDC Verification for Safety-Critical Designs – What You Need to KnowVerification is always a top priority for any…Read More
Ceva Unleashes Wi-Fi 7 Pulse: Awakening Instant AI Brains in IoT and Physical RobotsIn the rapidly evolving landscape of connected devices,…Read More
Adding Expertise to GenAI: An Insightful Study on Fine-TuningI wrote earlier about how deep expertise, say…Read MoreThe TI Experience and Morris Chang
This is the fourth in the series of “20 Questions with Wally Rhines”
I joined Texas Instruments (TI) in 1972. Most Stanford PhD’s in my field at that time remained in the Bay Area to work for Fairchild, National Semiconductor, HP or other local companies. But TI was the largest semiconductor company and there were plenty… Read More
The Technology China Trade Growing Snowball
As we have been warning for months the China trade issue continues to grow and accelerate. As we are approaching the June 30th cliff (when export sanctions will be announced) it seems as if the administration has given the industry a kick so we fly even further. The US will also restrict Chinese investment in US tech companies. The … Read More
Design for Power: An Insider View
The second keynote at Mentor’s U2U this year was given by Hooman Moshar, VP of Engineering at Broadcom, on the always (these days) important topic of design for power. This is one of my favorite areas. I have, I think, a decent theoretical background in the topic, but I definitely need a periodic refresh on the ground reality from the… Read More
Imec technology forum 2018 – the future of scaling
At the Imec technology forum in Belgium, Dan Mocuta and Juliana Radu presented “Evolution and Disruption: A Perspective on Logic Scaling and Beyond”, I also had a chance to sit down with Dan and discuss the presentation.
Device scaling
Scaling of devices will only get you so far, you need to look at new devices and new… Read More
When Why and How Should You Use Embedded FPGA Technology
If integrating an embedded FPGA (eFPGA) into your ASIC or SoC design strikes you as odd, it shouldn’t. ICs have been absorbing almost every component on a circuit board for decades, starting with transistors, resistors, and capacitors — then progressing to gates, ALUs, microprocessors, and memories. FPGAs are simply one more… Read More
RISC-V Ready (Tools) Set (Security) Go (Build)
The second Bay Area RISC-V Meetup event was held at the DoubleTree Hilton in Burlingame on June 19 with about 150 attendees. This event was hosted by SiFive and started with a networking session. The topics and speakers for the evening were:
- Commercial Software Tools – Larry Lapides, Imperas
- Securing RISC-V Processors –
Integrity, Reliability Shift Left with ICC
There is a nice serendipity in discovering that two companies I cover are working together. Good for them naturally but makes my job easier because I already have a good idea about the benefits of the partnership. Synopsys and ANSYS announced a collaboration at DAC 2017 for accelerating design optimization for HPS, mobile and automotive.… Read More
7nm Networking Platform Delivers Data Center ASICs
We all know IP is critical for advanced ASIC design. Well-designed and carefully tested IP blocks and subsystems are the lifeblood of any advanced chip project. Those IP suppliers who can measure up to the need, especially at advanced process nodes, will do well, absolutely.
It is interesting to note that eSilicon now has a very … Read More
Leveraging AI to help build AI SOCs
When I first started working in the semiconductor industry back in 1982, I realized that there was a race going on between the complexity of the system being designed and the capabilities of the technology in the tools and systems used to design them. The technology used to design the next generation of hardware was always lagging… Read More


AI RTL Generation versus AI RTL Verification