Designers require comprehensive logical, physical, and electrical models to interpret the results of full-chip power noise and electromigration analysis flows, and subsequently deduce the appropriate design updates to address any analysis issues. These models include: LEF, DEF, Liberty library models (including detailed… Read More





WEBINAR: A UVM Cookbook Update
Something I always admire about Mentor is their willingness to invest their time and money in helping the industry at large. They do this especially in verification where they sponsor periodic Wilson surveys on the state of verification needs and usage in the industry. More recently they introduced their UVM Cookbook, an introduction… Read More
GLOBALFOUNDRIES Pivoting away from Bleeding Edge Technologies
It’s no secret that I have been a big fan of GLOBALFOUNDRIES since they came about in March of 2009. We even included them in our first book “Fabless: The Transformation of the Semiconductor Industry” right next to TSMC. I am also a big fan of pivoting which is the term we use here in Silicon Valley to describe some of the most innovative… Read More
GloFo dropping out of 7NM race?
Could this be more bad news for semicap spend? Negative for US chip independence & AMD costs ? Rumors of Global Foundries dropping out of the 7NM race have been increasing rapidly. What could be a fatal blow to the GloFo 7NM program was AMD deciding to go with TSMC for 7NM first for one product and finally for its next generation CPUs.… Read More
A Closer Look at Fusion from Synopsys at #55DAC
Synopsys is pretty well-known for their early entry into logic synthesis with the Design Compiler tool and more recent P&R tool with IC Compiler, so I met up with two folks at DAC to get a better idea of what this new Fusion technology was all about where the barriers between tools are changing. Michael Jackson and Rahul Deokar … Read More
How Design Can Make Tech Products Less Addictive
It’s the summer of 2018, the summer of Fortnite, and we all know we are addicted. Addicted to email, Snapchat, Instagram, Fortnite, Facebook. We swap outdoor time on the trail for indoor time around the console. Our kids log into Snapchat every day on vacation to keep their streaks alive and then get lost in the stream.
We move less … Read More
Improving Yield and Reliability with In-Chip Monitoring, there’s an IP for that
There’s an old maxim that you can only improve what you measure, so quality experts have been talking about this concept for decades and our semiconductor industry has been the recipient of such practices to such an extent that we can now buy consumer products that include chips with over 5 billion transistors in them. You’ve… Read More
Semiconductors Become a Worldwide Business
This is the twelfth in the series of “20 Questions with Wally Rhines”
Among the companies that bought a license from AT&T to produce the transistor was Sony. While the U.S. maintained its lead in technology, other countries like Japan emerged as competitors. Semiconductor manufacturing was both labor intensive… Read More
Verifying ESD Fixes Faster with Incremental Analysis
The author of this article, Dündar Dumlugöl, is CEO of Magwel. He has 25 years of experience in EDA managing the development of leading products used for circuit simulation and high-level system design.
Every designer knows how tedious it can be to shuttle back and forth between their layout tool and analysis tools. Every time an… Read More
Webinar: Ensuring System-level Security based on a Hardware Root of Trust
A root of trust, particularly a hardware root of trust, has become a central principle in well-architected design for security. The idea is that higher layers in the stack, from drivers and OS up to applications and the network, must trust lower layers. What does it help it to build great security into a layer if it can be undermined… Read More
Rapidus, IBM, and the Billion-Dollar Silicon Sovereignty Bet