The Electronic System Design Alliance (ESDA) has been at the center of the EDA industry through its many changes over the years. It occurred to me that an update on this organization would be useful. ESDA is a technology community within SEMI and is managed primarily by a team of three who coordinate all its activities along with a … Read More
Security by Design: Arteris Expands Its Partnership with ArmArteris has expanded its partnership with Arm to…Read More
How early symmetry validation eliminates costly late-stage respinsBy Mauli Shah, Product Engineer, Siemens Analog and…Read More
Rethinking Formal Verification in the AI EraBy Kanav Arora, ML Researcher at ChipAgents Most…Read More
CEO Interview with Ann Wu and Akash Levy of SilimateAnn Wu is Co-founder & CEO of Silimate.…Read More
From Process Learning to Production Control: Characterization for the Era of Heterogeneous SystemsEvery generation of semiconductor innovation has relied on…Read MoreTSMC Process Simplification for Advanced Nodes
In the modern world, the semiconductor industry stands at the heart of technological innovation. From smartphones and laptops to advanced medical devices and artificial intelligence systems, nearly every piece of contemporary electronics depends on increasingly sophisticated microchips. Among the leading companies … Read More
CEO Interview with Juniyali Nauriyal of Photonect
Juniyali Nauriyal is the CEO and Co-Founder of Photonect, a photonics startup focused on commercializing advanced fiber-to-chip attachment technologies. Juniyali is the co-inventor of Photonect’s core technology, which forms the foundation of the company. As CEO, she leads Photonect in translating cutting-edge photonic… Read More
Podcast EP332: How AI Really Works – the Perspectives of Linley Gwennap
Daniel is joined by Linley Gwennap, technology analyst and author of the new book “How AI Really Works: The Models, Chips, and Companies Powering a Revolution.” Linley was the long-time editor of Microprocessor Report and chaired the popular Linley Processor Conferences.
Dan explores what impact AI is having on the market and… Read More
What is the 3nm Pessimism Wall and Why is it An Economic Crisis?
Chip design is getting more difficult as technology advances. Everyone knows that. A lot of the discussion around these issues tends to focus on the demands posed by massive AI workloads and the challenges of shifting to heterogeneous multi-die design. While these create real problems, there is an underlying effect that is making… Read More
CEO Interview with Aftkhar Aslam of yieldWerx
Aftkhar Aslam is the Co-Founder and Chief Executive Officer of yieldWerx and a semiconductor industry veteran with more than 30 years of experience spanning manufacturing, test engineering, yield management, IP strategy, and enterprise digital transformation.
Under his leadership, yieldWerx has become a trusted data and… Read More
Intelligent Networks: Power, Reliability, and Maintenance in Telecom — Webinar Preview
The upcoming webinar “Intelligent Networks: Power, Reliability, and Maintenance in Telecom” will focus on how telecommunications networks are adapting to growing demands for efficiency, resilience, and scalability. As telecom operators expand 5G deployments, integrate cloud-native architectures, and prepare for AI-driven… Read More
Custom IC Design using Additive Learning
Custom IC design has demanding technical requirements to produce accurate simulation results for timing and power analysis in the shortest run times. EDA vendors have been rushing to use AI and ML technology to meet these analysis requirements. I attended a webinar from Siemens on accelerating iterative design cycles with Solido… Read More
SiFive’s AI’s Next Chapter: RISC-V and Custom Silicon
In the rapidly evolving world of artificial intelligence and semiconductor design, open-standard processor architectures are gaining unprecedented traction. At the center of this shift is SiFive, a company founded by the original creators of the RISC-V ISA, which champions an open, extensible, and license-free alternative… Read More
Smarter IC Layout Parasitic Analysis
IC layout parasitics dominate the performance of custom digital, analog and mixed-signal designs, so the challenge becomes how to identify the root causes and to quantify the effects of parasitics during early design stages. The old method of iterating between layout, extraction, SPICE simulation, followed by manual debug… Read More


ASML High-NA EUV is Not Ready for High-Volume Production