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Tcling Your Way to Low Power Verification

Tcling Your Way to Low Power Verification
by Bernard Murphy on 09-11-2019 at 5:00 am

OK – maybe that sounds a little weird, but it’s not a bad description of what Mentor suggests in a recent white-paper. There are at least three aspects to power verification – static verification of the UPF and the UPF against the RTL, formal verification of state transition logic, and dynamic verification of at least some critical… Read More


GM’s Dashboard Surrender

GM’s Dashboard Surrender
by Roger C. Lanctot on 09-10-2019 at 10:00 am

There was a time when General Motors’ OnStar offering was readily and clearly understood by consumers for the fact that it did one thing incredibly well: summoning assistance in the event of a vehicle crash and airbag deployment. This now-23-year-old connected car solution still stands strong as a powerful brand-defining … Read More


AI Chip Prototyping Plan

AI Chip Prototyping Plan
by Daniel Nenni on 09-10-2019 at 6:00 am

I recently had the opportunity to sit down with a chip designer for an AI start-up to talk about using FPGA prototyping as part of a complex silicon verification strategy. Like countless other chip designers for whom simulation alone simply does not provide sufficient verification coverage, this AI start-up also believed that… Read More


For EDA Users: The Cloud Should Not Be Just a Compute Farm

For EDA Users: The Cloud Should Not Be Just a Compute Farm
by Randy Smith on 09-09-2019 at 10:00 am

When EDA users first started considering using cloud services from Google, Amazon, Microsoft, and others, their initial focus was getting access for specific design functions, such as long logic or circuit simulation runs or long DRC runs, not necessarily for their entire design flow. If you choose to use the cloud this way, you… Read More


Actel TI and TSMC Foundry Woes

Actel TI and TSMC Foundry Woes
by John East on 09-09-2019 at 6:00 am

TSMC was founded in 1987 by Morris Chang.  At about the same time, I was wrestling with the question of whether or not to join Actel.  Morris had been a top executive at Texas Instruments during the period when TI took ownership of the TTL market.  (See my week #8.  Texas Instruments and the TTL Wars)  I have to admit that when I first … Read More


NATO’s Collective Defense for Cyber Attack Remains Fragile

NATO’s Collective Defense for Cyber Attack Remains Fragile
by Matthew Rosenquist on 09-08-2019 at 3:00 pm

The Secretary-General of NATO, Jens Stoltenberg, stated all 29 member countries would respond to a serious cyberattack against any of the nations in the coalition. The pressing question is will NATO work together with combined forces when one of the members is attacked in an asymmetrical manner with digital technology?

When… Read More


Chapter Nine – Specialization Inhibits System Level Optimization

Chapter Nine – Specialization Inhibits System Level Optimization
by Wally Rhines on 09-06-2019 at 6:00 am

Solving critical customer problems sometimes isn’t enough.  One of my most interesting experiences came during the development and rollout of a product that was designed to optimize integration of hardware and embedded software.  In this case, the product performed exactly as planned but the plan ignored the organizational… Read More


TSMC OIP Overview and Agenda!

TSMC OIP Overview and Agenda!
by Daniel Nenni on 09-05-2019 at 6:00 am

The TSMC Symposium and OIP Ecosystem Fourm are the most coveted events of the year for the fabless semiconductor ecosystem, absolutely. In my 35 years of semiconductor experience never has there been a more exciting time in the ecosystem and that is clear by the overview and agenda for this year’s event. I hope to see you there:… Read More


Carnegie Robotics Case Study: RTLvisionPRO

Carnegie Robotics Case Study: RTLvisionPRO
by Daniel Nenni on 09-04-2019 at 10:00 am

RTLvisionPRO has proven to be an indispensable tool which has greatly improved the productivity and work-flow of our current task: understanding, verifying, and documenting the existing RTL IP library at our company. Consisting of about 500 Verilog and VHDL files, the library has been under development for several years and… Read More


AI, Safety and the Network

AI, Safety and the Network
by Bernard Murphy on 09-04-2019 at 6:00 am

If you follow my blogs you know that Arteris IP is very active in these areas, leveraging their central value in network-on-chip (NoC) architectures. Kurt Shuler has put together a front-to-back white-paper to walk you through the essentials of AI, particularly machine learning (ML) and its application for example in cars.

He… Read More