Beyond Traditional OOO: A Time-Based, Slice-Based Approach to High-Performance RISC-V CPUsFor decades, high-performance CPU design has been dominated…Read More
Orchestrating IC verification: Harmonize complexity for faster time-to-marketBy Marko Suominen and Slava Zhuchenya of Siemens…Read MoreBasilisk at Hot Chips 2025 Presented Ominous Challenge to IP/EDA Status QuoAt Hot Chips 2025, Philippe Sauter of ETH…Read More
GlobalFoundries 2025 Update GTS25"GTS25 brings together leaders from across the semiconductor…Read More
A few months ago, I wrote about the announcement of a new digital full flow from Cadence. In that piece, I focused on the machine learning (ML) aspects of the new tool. I had covered a discussion with Cadence’s Paul Cunningham a week before that explored ML in Cadence products, so it was timely to dive into a real-world example of the … Read More
There have been a multitude of announcements recently relative to the incorporation of machine learning (ML) methods into EDA tool algorithms, mostly in the physical implementation flows. For example, deterministic ML-based decision algorithms applied to cell placement and signal interconnect routing promise to expedite… Read More
An Artificial Intelligence (AI) system is only as good as its training. For AI Machine Learning (ML) and Deep Learning (DL) frameworks, the training data sets are a crucial element that defines how the system will operate. Feed it skewed or biased information and it will create a flawed inference engine.
An update is now available here: Application-Specific Lithography: Patterning 5nm 5.5-Track Metal by DUV
The 5nm foundry (e.g., TSMC) node may see the introduction of 6-track cells (two double-width rails plus four minimum-width dense lines) with a minimum metal pitch in the neighborhood of 30 nm. IMEC had studied a representative… Read More
The Zero Trust Model of information #security simplifies how #information security is conceptualized by assuming there are no longer “trusted” interfaces, applications, traffic, networks, or users. It takes the old model— “trust but verify”—and inverts it, because recent breaches have proven that when an organization trusts,… Read More
Time to Change our Thinking:
It is time to work the other side of the communications equation. Send less data. But apply new synthetic data science and machine learning to get more and richer information: a way that requires the transfer of radically fewer actual bits – perhaps 1 or 2% of the bits – but with higher model fidelity.… Read More
We always warn clients that even in the best of times, Joint Ventures (JVs) in China always end in tears. And we are far from the best of times right now. There is a major example of this playing out right now with Arm China.
Arm’s China JV is, to put it simply, a bit of a mess. The Board has fired the CEO, but he has refused to leave. And owing… Read More
There is an interesting white paper out from Mentor on how a customer used the Solido Varation Designer tool to reduce Monte Carlo simulations. As you may know I worked for Solido for 10+ years up until they were acquired by Mentor in December of 2017. It was an incredible personal and professional experience. I have the highest respect… Read More
The COVID-19 pandemic has turned the business of reporting news into a funhouse mirror where reality is distorted, up is down, and hopes for improving health and marketplace conditions are simultaneously raised and dashed on a daily basis. The latest news-driven whiplash moment arrived this morning care of the Detroit Free Press
In this, the second part of a two-part series we delve further into defining worst case, this time focusing specifically on device performance.
In the last blog we talked about the steady increase in power density per unit silicon area and how worst case is definitely getting worse. We discussed how in each new FinFET node the dynamic… Read More
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Intel’s Pearl Harbor Moment