Webinar: RF board design flow examples for co-simulating active circuitsIn part one of this webinar series, Keysight…Read More
Ceva-XC21 and Ceva-XC23 DSPs: Advancing Wireless and Edge AI ProcessingCeva recently unveiled its XC21 and XC23 DSP…Read More
Going Beyond DRC Clean with Calibre DEFor advanced semiconductor designs, achieving both design rule…Read More
Cut Defects, Not Yield: Outlier Detection with ML PrecisionHow much perfectly good silicon is being discarded…Read More
Compute and Communications Perspectives on Automotive TrendsAutomotive electronics is a fast-moving space, especially around…Read More
For advanced semiconductor designs, achieving both design rule check clean layouts and optimal electrical performance is crucial for minimizing design iterations, reducing time-to-market and ensuring product reliability. Balancing electrical performance and layout integrity is a difficult task. Achieving an optimal… Read More
Dan is joined by Nick Kepler, COO and Director at Silicon Catalyst. Nick has over 30 years of experience in the semiconductor industry, with varied leadership and technology management roles including semiconductor process technology development and manufacturing, design enablement, technical program management, and … Read More
Jonas Sundqvist received his PhD in inorganic chemistry from Uppsala University, Department for Materials Chemistry at The Ångström Laboratory in 2003 where he developed ALD and CVD processes for metal oxide ALD and CVD processes using metal iodides. Jonas is in charge of the daily business at AlixLabs – as a co-founder, he’s… Read More
How much perfectly good silicon is being discarded in the quest for reliability? During high-volume chip manufacturing, aggressive testing with strict thresholds may ensure quality but reduces yield, discarding marginal chips that could function flawlessly. On the other hand, prioritizing yield risks allowing defective… Read More
With half-pitch approaching 10 nm, EUV patterning is heavily impacted by stochastic effects, which are aggravated from reduced image contrast from electron blur [1]. A two-mask (“LELE”: Litho-Etch-Litho-Etch) approach was proposed to pattern core features for self-aligned double patterning (SADP)… Read More
Tell us a little bit about yourself and your company.
I’m James Cannings, the Executive Chairman of QPT. QPT is a power electronics start-up with a vision to reduce global electricity consumption by 5%, saving billions and moving the needle on the Net Zero challenge. Electric motors use up to 50% of the world’s electricity and our… Read More
Automotive electronics is a fast-moving space, especially around sensing and distilling intelligence from that sensing. This serves three main pillars: autonomy, electrification and advances in the car cockpit. Autonomy at multiple levels remains an important goal and continues to advance, technically and geographically.… Read More
Dr. Thang Tran is an innovator in modern computing, drawing inspiration from pioneers like Seymour Cray, Thornton, and Tomasulo. His work leverages the simplicity of the RISC-V ISA to advance microprocessor efficiency, integrating vector processing and scoreboarding principles foundational to early supercomputing. Thang… Read More
When Semidynamics added support for int4 and fp8 data types to their RISC-V processors, it clearly indicated their intent to target AI inference with hundreds or perhaps thousands of concurrent threads running in their advanced caching and pipelining scheme. Two recent announcements around Embedded World 2025 reinforce their… Read More
Great news last week as Intel fills the CEO slot for the 9th time in 56 years with industry legend Lip-Bu Tan. From what I hear, Intel employees, and the entire industry for that matter, are overjoyed. I’m sure there are one or two competing companies that are concerned but overall it is an absolute love fest.
If you look at education… Read More
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Elon Musk Given CHIPS Act & AI Oversight – Mulls Relocation of Taiwanese Fabs