New Cooling Strategies for Future ComputingPower densities on chips increased from 50-100 W/cm2…Read More
DAC News – proteanTecs Unlocks AI Hardware Growth with Runtime MonitoringAs AI models grow exponentially, the infrastructure supporting…Read More
Sophisticated soundscapes usher in cache-coherent multicore DSPDigital audio processing is evolving into an art…Read More
A Quick Look at Agentic/Generative AI in Software EngineeringAgentic methods are hot right now since single…Read More
Shipments of PCs and smartphones were weak in 2022 and continue to decline in 2023. For the first quarter of 2023, IDC estimated PC shipments dropped 29% from a year earlier. This follows a 28% year-to-year decline in 4Q 2022. For the year 2022, PC shipments declined 16% from 2021, the largest year-to-year decline in the history of… Read More
As digital transmission speeds increase, designers use various techniques to improve the signal-to-noise ratio at the receiver output. One such technique is the Decision Feedback Equalizer (DFE) scheme, commonly used in high-speed Serializer-Deserializer (SerDes) circuits to mitigate the effects of channel noise and … Read More
Normalized image log-slope (NILS) is probably the single most essential metric for describing lithographic image quality. It is defined as the slope of the log of intensity, multiplied by the linewidth [1], NILS = d(log I)/dx * w = w/I dI/dx. Essentially, it gives the % change in width for a given % change in dose. This is particularly… Read More
Dan is joined by Matt Genovese. Matt founded Planorama Design, a user experience design professional services company to design complex, technical software and systems that are simple and intuitive to use while reducing internal development and support costs. Staffed with seasoned engineers and user experience designers,… Read More
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At the recent Synopsys Users Group Meeting (SNUG) I had the honor of leading a panel of experts on the topic of chiplets. The discussion was based on a report published by the MIT Technology Review Insights in cooperation with Synopsys. This is a very comprehensive report (12 pages) that is available online HERE.
Here is the preface… Read More
Traveling by car is something that I take for granted and I just expect that my trips will be safe, yet our cars are increasingly using dozens of ECUs, SoCs and millions of lines of software code that combined together present a target for hackers or system failures. The Automotive Safety Integrity Levels (ASIL) are known by the letters:… Read More
Harry Foster is Chief Scientist in Verification at Siemens EDA and has held roles in the DAC Executive Committee over multiple years. He gave a lunchtime talk at DVCon on the verification complexity topic. He is an accomplished speaker and always has a lot of interesting data to share, especially his takeaways from the Wilson Research… Read More
Dan is joined by Suk Lee, Vice President of Design Ecosystem Development at Intel Foundry Services. He has over 35 years of experience in the semiconductor industry, with engineering, marketing, and general management positions at LSI Logic, Cadence, TI, Magma Design Automation and TSMC. At TSMC, he was responsible for managing… Read More
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Memory Innovation at the Edge: Power Efficiency Meets Green Manufacturing