WP_Term Object
(
    [term_id] => 139
    [name] => sureCore
    [slug] => surecore
    [term_group] => 0
    [term_taxonomy_id] => 139
    [taxonomy] => category
    [description] => 
    [parent] => 178
    [count] => 11
    [filter] => raw
    [cat_ID] => 139
    [category_count] => 11
    [category_description] => 
    [cat_name] => sureCore
    [category_nicename] => surecore
    [category_parent] => 178
)
            
WP_Term Object
(
    [term_id] => 139
    [name] => sureCore
    [slug] => surecore
    [term_group] => 0
    [term_taxonomy_id] => 139
    [taxonomy] => category
    [description] => 
    [parent] => 178
    [count] => 11
    [filter] => raw
    [cat_ID] => 139
    [category_count] => 11
    [category_description] => 
    [cat_name] => sureCore
    [category_nicename] => surecore
    [category_parent] => 178
)

sureCore Brings 16nm FinFET to Mainstream Use With a New Memory Compiler

sureCore Brings 16nm FinFET to Mainstream Use With a New Memory Compiler
by Mike Gianfagna on 04-04-2024 at 10:00 am

SureCore Brings 16nm FinFET to Mainstream Use With a New Memory Compiler

Semiconductor processes can have a rather long and interesting life cycle. At first, a new process defines the leading edge. This is cost-no-object territory, where performance is king. The process is new, the equipment to make it is expensive, and its use is reserved for those that have a market (and budget) big enough to justify its use. As the technology matures, yields go up, costs go down, access becomes easier and more mainstream applications start to migrate toward the node as newer technologies take the leading-edge spot. I clearly remember when 16nm FinFET was that leading edge, much sought after technology. But that is now the past and 16nm FInFET is finding application in mainstream products, but there is a catch. As I mentioned, 16nm FinFET was all about speed, often at the expense of power. But mainstream applications can be very power sensitive. The good news is that sureCore is fixing the problem. Read on to see how sureCore brings 16nm FinFET to mainstream use with a new memory compiler.

The 16nm Problem

Applications such as wearables, IoT and medical devices can be good matches for what 16nm FinFET has to offer. The combination of performance, density and yield offered by the technology can be quite appealing. Also, cutting operating voltage generates substantial power savings while still delivering the needed performance. The technology has been in production for over ten years. This means the process is quite stable and yields are high. The fabs involved are largely depreciated as well. All this brings the cost of 16nm FinFET in reach for lower cost, power sensitive devices.

Can low power applications implemented in 28 or 22nm bulk or FDSOI cut ASPs and deliver better features and power with 16nm?  Things seem to line up well except for the key point made earlier: 16nm FinFET was focused on performance first, so much of the IP available for the node is built with performance in mind – power optimization was not central to its design, so a mismatch with newer, power-sensitive applications exists.

The sureCore Solution

sureCore is a company that tends to change the rules and open new markets. A recent post discussed how the company is enabling AI with low power memory IP. sureCore is even working with Agile Analog to enable quantum computing. So, opening 16nm FInFET to a broad range of applications is certainly in the sureCore wheelhouse.

Recently, the company announced the availability of its PowerMiser ultra-low, dynamic power memory compiler in 16nm FinFET. This effectively opens new opportunities for application of the technology by allowing demanding power budgets to be met.

Paul Wells, sureCore’s CEO explains the details quite well:

“FinFET was developed to address the increasingly poor leakage characteristics of bulk nodes. In addition, the key driver for the mobile sector was ever greater performance to deliver new features and a better user experience. The power consumption was not deemed a significant issue, as both the radio and the display were the dominant factors in battery life determination. This, in addition, to the relatively large form factor of a mobile phone meant that the batteries had capacities in excess of 3-4000mAH.”

He went on to highlight sureCore’s strategy:

“However, designers of power sensitive applications such as wearables and medical devices with much more constrained form factors and hence smaller batteries need a range of power optimised IP that can exploit the power advantages of FinFET whilst being much less concerned about performance. This has meant a demand for memory solutions that are specifically tailored to deliver much reduced power consumption. By providing the PowerMiser SRAM IP, sureCore is enabling the shift to mature FinFET processes for low power applications and is thus helping to provide clear differentiation for such products based on both cost and battery life. By doing so, the all-important competitive advantage over rivals may be realised.”

You can read the full text of the press release here .  And that’s how sureCore brings 16nm FinFET to mainstream use with a new memory compiler.

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