ESL Expertise when You Need It. Spinning Up Faster

System-level expertise, once the domain a few architecture specialists, is now shouldering its way everywhere into chip design and verification. In virtual modeling together with OS and application software certainly. That now couples into mixed-level system-verification, using different levels of abstraction for different parts of the system. In architecture analysis for major components, connecting to frameworks especially for AI. For hardware and software partitioning and experimenting with memory architectures. Verifying your architectural model against extensive test suites. And finally synthesizing the design to RTL while experimenting with further micro-architectural performance and power choices. You need more ESL expertise for non-experts.

When ESL becomes essential but is not a core-expertise

At one time ESL was dismissed as a fringe concept, interesting primarily to academics and super-early adopters. However, AI and the sheer size of AI test databases has put that idea to rest. If you want to do more than simply drop your trained DNN on an AI accelerator, especially if you want to experiment with memory optimization, you’re going to have to go through some kind of ESL path. If you want to verify image recognition test suites on the design, you have to do that in ESL. Attempting this at RTL would be insanely slow. And if you have to be competitive in performance and power, you have to optimize at the micro-architectural level. Fiddling with clock gating isn’t going to get you there.

The challenge for many of us is that while we have teams of smart people, they’re expert in RTL, not ESL. Now they have to learn about TensorFlow, PyTorch and other strange frameworks. And they have to learn about ESL. They’re smart, they’ll get there but is there any way you can speed up that learning curve? That’s the goal of CircuitSutra. They’re a consulting organization providing assistance in accelerating adoption of ESL methodologies for active design teams.

Endorsements

They’ve already proven their worth in projects at LG, TI and GreenSocs, among others. One endorsement was for the company developing the TLM Kit and sockets for a proprietary SoC bus. The kit they built is compliant with Accellera TLM2.0 and was used to develop the SystemC models of peripheral IP. Even better, the kit relieves the model developer from the complexity of TLM rules for modeling data communication at different abstraction levels. These range from loosely timed to cycle accurate TLM, with very simple-to-use abstraction-independent APIs. The level of abstraction can be changed at run time, allowing the modeler to dynamically adjust the performance accuracy trade-off, for instance, to support “fast-forwarding”. CircuitSutra came up with an innovative design that is extensible and can be easily adapted for any SoC bus architecture. They also developed a very comprehensive test-suite and ensured high functional coverage.

Another mentioned that CircuitSutra have successfully executed several modeling projects for their SoC bus architecture, Virtual Platform development, Integrating Virtual platform with the debugger and other tools, OS bring up on the virtual platform, SystemC Models of Image processing IP, Audio IP and OS bringup on VP. They particularly called out CircuitSutra as having strong expertise in modeling domain.

Also, very topical, they’ve added ESL expertise around RISC-V. Sounds like a company you should get to know.

You can learn more about the company in this video. And you can learn more about CircuitSutra HERE.