If your company develops Design IP to support well-known protocols like USB, PCIe, HDMI, DDRn memory controller, MIPI specification (and more), it’s crucial to know your competition, the market size by segment, and even more important the market potential by segment. The latest can be obtained by the Compound Annual Growth Rate (CAGR) calculated on actual data, or the revenue made in the past, in conjunction with a realistic forecast calculated through a clearly defined methodology.
If your company develops IC or System-on-Chip (SoC) and source Controller or PHY IP externally, it’s also critical to select the right protocol, then the best IP vendor. The right protocol will guarantee that your product is well positioned in the targeted segment and will interoperate properly with the other IC, ASSP, ASIC or FPGA. The right protocol will also have to be supported by a standardization organization, working to support an aggressive enough roadmap: if you use the Release 2.0, you want to make sure that Release 3.0 will exist, so your investment (design resource, marketing) will be made for the long term. The right vendor will be this able to guarantee the best (features, performances and quality) to price ratio, but not only! We will come back later to the various parameters weighting in the buying decision process…
The above picture, extracted from the “Interface IP Survey” last version (Release 6), is published for the first time and it’s for Semiwiki readers. The key information is the CAGR value for 2008-2013 IP revenues generated by all vendors involved into USB, PCIe, DDRn, MIPI and HDMI (license only). A 19% CAGR clearly indicates that the adoption for interface protocols is strong, not limited to few high end applications, but industry wide. This CAGR value also confirms that chip makers tend to source externally IP functions that they may had designed five years ago. The next question immediately arises: will IP revenue continue to grow, if yes, at which rate?
Answering this simple question will require a complete, comprehensive analysis by protocol. In fact, to be in the position to build a (credible) forecast, an analyst like IPNEST has to work hard on the market understanding, segment by segment, protocol by protocol. A high level view of the global IP market may be enough for Wall Street analyst, but not for building strategy planning! That’s why the Interface IP Survey answers to the following questions:
- IP vendor ranking by 2013 IP License revenue, by protocol, for USB, PCI Express, HDMI, SATA, MIPI, DisplayPort, Ethernet and DDRn Memory Controller,
- IP vendor ranking, protocol by protocol, for the last 5 years
- 5 years cumulated revenue by protocol for the leaders (such information can be linked with the IP robustness and quality)
- Competitive analysis by protocol: an exhaustive review of all the vendors, not only the leaders, will provide a complete picture, as well as information for potential acquisition (Evatronix or Transwitch acquisition by Cadence)
- Pricing Information: Controller and PHY IP license price (by technology node for PHY)
The picture below (once againbuilt specifically for Semiwiki readers, never published before!) help understanding that the growth behavior is not similar for all standard related IP. The survey also integrates an analysis, by standard, explaining the reasons for such behavior…
At this stage, you may think that you real concern, and the most crucial question is related to the future. You expect to see a forecast, and you want it by protocol, like me!
Building a forecast is probably the most complicated piece of work, as many different parameters are interlinked, so you need to extract the various parameters, rank it by respective impact and models it. You need to define the right methodology. In the 2014 version of the Interface IP survey, our methodology is:
- Extract the number of design start including a specific standard (say, PCI Express), from the revenues made by the IP vendors last year. At this stage, you need to know who sell Controller IP only, or PHY IP only or an integrated solution, the above mentioned comprehensive analysis will help you to answer.
- Evaluate the “IP sourcing” penetration rate for this specific protocol, in respect with the TOTAL design starts. An IP sourcing rate of 50% tells you that the total number of design starts is twice the above calculated number.
- Calculate this TOTAL design starts number, by protocol.
- Evaluate this TOTAL number evolution for the 5 next years. In fact, if the industry agrees about the fact that ASIC and ASSP design start tend to decrease in the future, this TOTAL number may increase, due to the standard pervasion within the industry.
- Once this evaluation has been made for the next 5 years, by protocol, you have to make another assumption: evolution of the penetration rate of external sourcing (may vary by protocol), for the PHY and for the Controller (may be different).
- Now, you can start to calculate the 5 years forecast. And when you have a doubt and need to make a new assumption, the answer will be strongly linked with your market understanding… that’s why the version 6 of the Interface IP survey is certainly the best ever written!
This forecast is currently in the validation stage, and the complete survey will be available before the end of September. You may find additional information here and the Table of Content for “Interface IP Survey 2010-2013 – Forecast 2014-2020” will be available soon (you may contact me through Linkedin if you want to receive it as soon as it will be completed).
Eric Esteve from IPNEST –
This survey is applicable to:
- IP vendors
- Marketing, Strategy Planning
- CEOs
- Silicon Foundries, ASIC companies
- IP Marketing
- Ecosystem and IP Qualification Managers
- Research Consortium (IMEC, KSIA, Etc.)
- Chip Makers (IDM or Fabless)
- IP Purchasing Managers
- IP Outsourcing Managers
IPNEST is the leader on the IP dedicated surveys, enjoying this long customer list:[INDENT=3]Synopsys, (US)
Cadence, (US)
Rambus, (US)
Arasan, (US)
Denali, (US) now Cadence
Snowbush, (Canada) now Semtech
MoSys, (US)
Cast, (US)
eSilicon, (US)
True Circuits, (US)
NW Logic, (US)
Analog Bits, (US)
Open Silicon, (US)
Texas Instruments, (US)
INTEL, (US)
PLDA, (France)
Evatronix,(Poland)
HDL DH, (Serbia)
STMicroelectronics (France)
IMEC, (Belgium)
Inventure, (Japan) now Synopsys
“Foundry” (Taiwan)
UMC, (Taiwan)
GUC, (Taiwan)
KSIA, (Korea)
Sony, (Japan)
SilabTech, (India)
Fabless,(Taiwan)
Next Generation of Systems Design at Siemens