Right now, the most prevalent generation of Ethernet for data centers is 400 Gbps, with the shift to 800 Gbps coming rapidly. It is expected that by 2025 there will be 25 million units of 800 Gbps shipped. Line speeds of 100G are used predominantly for 400 Gbps Ethernet – requiring 4 lanes each. Initially 800 Gbps will simply move to 8 lanes, but the bulk of 800 Gbps will ultimately use 200G lanes. This move to 800 Gbps and the expected use of 200G lanes is adding huge impetus to the development of modulation standards for 200G lanes.
For long reach connections line loss and power are major factors in determining what modulation method should be used in going to 200G. 100G uses 4-PAM. There is a recent video and white paper from Alphawave IP, a developer of advanced communications IP, on this topic that compares the various options. The video, titled “Connecting the Digital World—The Path to 224 Gbps Serial Links” also looks at other methods that can be used to improve data rates while not consuming excessive power. In the video Alphawave IP President and CEO Tony Pialis reviews the options that the industry has for moving forward on 200G standards.
Tony goes through 2-PAM, 4-PAM, 6-PAM, 8-PAM, QPSK and 16-QAM comparing the tradeoffs for each. It seems that for each one there is a penalty in power, SNR or Eb/No to maintain the needed bit error rate. Doubling the frequency for 4-PAM requires more power than 6-PAM and requires more bandwidth. 2-PAM requires even more power. 6-PAM and 8-PAM suffer from decreased SNR due to the smaller constellation spacing. QPSK and 16-QAM require more channel capacity compared to PAM modulation techniques. They also suffer from increased Eb/No or power. There is more to this and I suggest viewing the video to get the full picture.
Other novel methods can be utilized to help reduce errors and increase line efficiency. Tony starts by describing an advanced DSP technique that can improve the integrity of the received signal with virtually no penalty. He proposes the use of Decision Feedback Equalizers (DFE) to remove inter-symbols interference (ISI). With the receipt of each identified symbol, the remnant of that symbol can be factored out of the subsequent symbol by using DSP techniques. This makes it easier to interpret the incoming symbol.
Another application of advanced DSP techniques is Maximum Likelihood Sequence Detectors (MLSD) which creates a usable analog model of the channel to predict what various incoming symbol sequences would look like after transiting the channel. By comparing the actual received signal with various possible data patterns, the data pattern with the lowest mean square error compared to the actual signal can help identify the correct sent data.
Amplifying a signal boosts the noise just as much as the data, so smarter methods like the two listed above have a lot to offer as data rates push harder against the absolutes limits of Ethernet connections and board/package losses at higher data rates. The methods above are also very power efficient.
Tony closes with his thoughts on the use of error correction and modulation methods. 4-PAM is really not able to support longer channels. This leaves 6-PAM as a good alternative for long range links. He even hints at a standard that could mix modulation methods based on the channel. There is no doubt that the push to 200G lanes is on, and we can expect to see its use in 800 GbpE and even 1.6TbE. The full video is available here on the Alphawave IP website.
Also Read:
The Path to 200 Gbps Serial Links
Enabling Next Generation Silicon In Package Products
Alphawave IP is Enabling 224Gbps Serial Links with DSP
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