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Electrical Verification The invisible bottleneck in IC design 3
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A Webinar About Electrical Verification – The Invisible Bottleneck in IC Design

A Webinar About Electrical Verification – The Invisible Bottleneck in IC Design
by Mike Gianfagna on 12-16-2025 at 6:00 am

A Webinar About Electrical Verification – The Invisible Bottleneck in IC Design

Electrical rule checking (ERC) is a standard part of any design flow. There is a hidden problem with the traditional approach, however. As designs grow in complexity, whether full-custom analog, mixed-signal, or advanced-node digital, the limitations of traditional ERC tools are becoming more problematic. This can lead to missing subtle but dangerous electrical errors/failures. Aniah has developed a fundamentally new approach to ERC. Using the company’s ERC platform, every net is analyzed in all its electrical states and all electrical errors are detected early, automatically, and without tedious setup.

Aniah recently presented a webinar on the perils of traditional ERC and the benefits of its new approach. A very detailed analysis of the problem and the solution is presented, along with a live demonstration. If hidden ERC errors worry you, this is a must-see webinar. A replay link is coming but first let’s examine what is covered in a webinar about electrical verification – the invisible bottleneck in IC design.

The Webinar Presenters

PresentersThe webinar is kicked off by Blandine Guivier – Aniah sales director for Europe. Blandine has over 12 years of experience in the semiconductor and EDA industries. She leads Aniah’s European business, helping semiconductor companies accelerate innovation through smarter electrical verification with Aniah’s OneCheck® platform.

After Blandine’s overview, Meryam Bouaziz conducts a live demonstration. She is an application engineer at Aniah. Meryam works with semiconductor companies to deploy Aniah’s OneCheck platform to improve the overall design reliability flow. Combining strong technical expertise, she worked as an analog design engineer in the beginning of her career for two years and then joined Aniah in 2023.

The demo is followed by a very useful Q&A session where questions from the live audience are answered. The entire event is under 40 minutes, so a lot of good information is covered very efficiently.

The Presentation

Blandine covers ERC fundamentals and the challenges presented by advanced designs. She then discusses Aniah’s OneCheck platform, covering adoption, breakthrough features and resulting design confidence. Regarding the fundamentals of ERC, the slide below, taken from the webinar summarizes what ERC is and why it’s important.

ERC Fundamentals
ERC Fundamentals
Verification Gap
Verification Gap

Next, Blandine discusses how verification productivity has not kept up with design and manufacturing productivity, resulting in a verification productivity gap as shown in the diagram to the right. Blandine covers the details behind this gap during her presentation.

She then describes Aniah’s OneCheck as the industry’s first shift-left ERC solution. Blandine goes into a lot of detail regarding how OneCheck can make a significant impact in verification productivity and design confidence.

Some top-level points she begins with include:

  • The platform is easy to adopt and simple to use, without the need for tech files from the foundry
  • It empowers designers and CAD teams with unprecedented error coverage
  • And it delivers a drastic reduction in false errors

Blandine provides detailed information to show how OneCheck achieves these goals. Customer experience and comments are included, as well as details of how the tool is integrated into existing design flows. Details about the range of errors found by OneCheck is also provided. The breadth of coverage is impressive. Specifics of how OneCheck performs its unique analysis are also presented.

The Demonstration

Meryam then provides a live demonstration of OneCheck. The demo focuses on three main topics:

  • The ease of use of OneCheck
  • The ease of debug for the errors found
  • The quality of the coverage (reduction in false errors)

Only the circuit description is needed, no tech files so startup is indeed easy. Meryam selects a subset of errors to check for and runs the tool. She then goes through a detailed discussion of what errors were found, how to group them and how to determine the root cause. You will need to see this part for yourself to get a feeling for ease of use and clarity of results. I found it quite easy to follow the setup and analysis.

OneCheck is integrated with Cadence, so errors found can be cross-probed directly in Virtuoso. This clearly eases the debugging process.  Meryam examines several errors this way, performing analysis in OneCheck and cross-probing directly to Virtuoso. The process is quite impressive – you should see it for yourself.

To Learn More

If verification is getting more difficult for you as designs get larger and more complex, Aniah can help reduce this problem with its unique OneCheck ERC platform. You should definitely check it out. The time will be well-spent. You can access the webinar replay here. And that’s a webinar about electrical verification – the invisible bottleneck in IC design.

 

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