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800x100 Efficient and Robust Memory Verification 
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Synopsys
Posted on by Daniel Nenni

High-Productivity Analog Verification and Debug

High-Productivity Analog Verification and Debug
by Daniel Nenni on 07-08-2012 at 10:40 pm
Categories: EDA, Synopsys

See how Synopsys’ advanced analog verification solution can dramatically increase your verification productivity with CustomExplorer Ultra, along with CustomSim and CustomSim-VCS. CustomExplorer Ultra is a comprehensive simulation and debug environment for analog and mixed-signal design verification.

Web event: High-Productivity Analog Verification and Debug with CustomSim and CustomExplorer Ultra
Date: July 11, 2012
Time:10:00 AM PDT

Duration: 45 minutes + Q&A

REGISTRATION

This webinar demonstrates an advanced verification methodology using CustomExplorer Ultra with CustomSim and CustomSim-VCS that enables highly-productive verification and debug of analog and mixed-signal designs. CustomSim and CustomSim-VCS provide fast simulation engines while CustomExplorer Ultra is a complete verification environment for managing simulation corner and Monte Carlo setup, a flexible simulator interface, multiple testbenches, and interactive cross-probing with popular design environments, such as Galaxy Custom Designer and Virtuoso ADE for fast circuit debugging.

Speakers:

Duncan McDonald
Product Marketing Manager, Synopsys

Duncan has more than 20 years of experience in EDA, holding positions in engineering, sales, and marketing all related to analog and mixed-signal design. Duncan is the author of 3 U.S. patents and holds degrees from UC Berkeley and the University of Santa Clara.

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