In the first part of this article I wrote about four types of costs which must be considered when an IP goes through design differentiation, customization, characterization, and selection and evaluation for acquisition. In this part of the article, I will discuss about the other five types of costs which must be considered to enhance… Read More
Electronic Design Automation
Solidly Across the Chasm
Last week I wrote about EDA companies crossing the chasm, with Jim Hogan (who needs no introduction) and Amit Gupta, CEO of Solido. So how did those rules work out for Solido?
See also Getting EDA Across the Chasm: 15 Rules Before and 5 After
The founding team of Solido:
- discovered process variation for analog was a problem as companies
Something Old, Something New…EDA and Verification
When I got the opportunity to blog about verification, I thought, what new and interesting things should I talk about? Having started my EDA career in 1983, I often feel like one of the “oldies” in this business…remember when a hard drive required a static strap, held a whopping 33 MB, and was the size of a brick? Perhaps they should … Read More
Leveraging Synopsys’ Lynx Design System for SoC Designs on Advanced Nodes
There was a time when design goals were decided in the beginning, targeted on a particular technology node, design planning done for the same, and implementation done through point tools connected indesign flows customized according to the design. It’s no longer the case for modern SoC designs; there are multiple technology … Read More
What’s Testing Design Limits at ITC?
The 46[SUP]th[/SUP] IEEE International Test Conference (ITC) will be held the week of October 5, 2015 at the Disneyland Hotel Conference Center in Anaheim, California. ITC is where you will discover the latest ideas and learn about practical applications of test technologies.
As you take in panels, tutorials, presentations,… Read More
Getting EDA Across the Chasm: 15 Rules Before and 5 After
Crossing the Chasm by Geoffrey Moore (not that G. Moore!) is one of the most well known books on high technology marketing. When I worked at VaST, Mohr Davidow Ventures (MDV) invested in us and Moore (not Mohr), who was a partner there, spent an afternoon with us brainstorming what it would take for us to cross the chasm. Coincidentally,… Read More
Top 10 Reasons to invest in Interactive Design Rule Checking tools
One of the most energetic presentations at the recent TSMC OIP 2015 symposium was given by Tom Williams from Qualcomm, who shared his insights (and enthusiasm!) for Mentor’s Calibre RealTime interactive Design Rule Checking (iDRC) product.
Paraphrasing Tom’s presentation (and with a tip of the hat to David Letterman), here … Read More
EDA By the Numbers, Phil Kaufman, Emerging Companies and More
The quarterly numbers are out from the EDAC Market Statistics Service (MSS) for Q2. The headline number is that revenue for the industry increased by 8.5% for Q2 to $1906.5M versus $1759.9M in Q2 last year. The four quarter moving average, that smooths out a lot of seasonality by comparing the most recent four quarters to the prior… Read More
Automotive MCU code fault-busting with vHIL
With electronic and software content in vehicles skyrocketing, and the expectations for flawless operation getting larger, the need for system-level verification continues to grow. Last month, we looked at a Synopsys methodology for virtual hardware in the loop, or vHIL… Read More
IoT need Low-cost, Low-power…and Silicon Proven IP
Today, IoT devices are available in our daily life through wearable, smart appliances or metering application and some prediction call for 33 billion connected objects, 25 billion being IoT by 2020 (Gartner, 2014). Being very synthetic, IoT device (smart appliance or wearable object) will be wirelessly and securely connected… Read More
Solving the EDA tool fragmentation crisis