Feed Your Mind and Body at 52nd DAC!

My beautiful wife and I attend the Design Automation Conference together whenever possible. More so now that she is the co-founder and CFO of SemiWiki. It is really nice for her to put a face to the invoices and personally thank our subscribers. Her first DAC was 1985 in Las Vegas. We were married for less than a year so it was like a second honeymoon. She still remembers getting fudge sundaes at midnight after one of the big EDA parties which was a bit on the rowdy side even for us recent college grads.

The DAC parties are much more civilized now that most of us are approaching AARP status. Funny story, I put an AARP advertisement on SemiWiki as an April fools joke this year. It got more than 3,000 clicks so I guess the joke was on me.

Anyway, my wife and I enjoy the DAC parties and will be attending as many as possible this year. If you want me to attend your party I will need a +1, VIP passes get priority. SemiWiki is sponsoring the Wednesday night DAC reception in the foyer again. Last year we had a book signing and gave away hundreds of books compliments of eSilicon. This year we will be giving away some very nice pens with touch screen tips on them. If I can find a book sponsor there will be books as well. Six of the eight SemiWiki bloggers will also be there and we would be pleased to meet you.

During the day, breakfast and lunch presentations are my favorite (I still blog for food). Cadence is really going big this year so you will want to check them out. Here is a quick list of food events from one of their mailers:

Feed your appetite for technical knowledge at one of our breakfast or luncheon panels at DAC 2015. You’ll hear from Cadence® tech experts, our customers, and our partners as they share their electronic design expertise and experiences in Room 104 in front of Exhibit Halls B/C at the Moscone Center.

Schedule
Monday, June 08, 2015
LUNCHEON:How to Make Next-Generation Verification Smarter
Room 104
12:00PM – 01:30PM

Hear our panel of experts discuss the key technologies needed to address the next level of verification challenges. They’ll cover a variety of questions, such as: What role will hardware-assisted development play in the context of other verification engines? How can verification become smarter? Will the next level of abstraction save the day and move verification to the transaction level?

REGISTER HERE

Tuesday, June 09, 2015
BREAKFAST:Crossing the Great Divide: How to Safely Navigate the Move from 28nm to 16FF+
Room 104
7:30AM – 09:00AM

What are the biggest challenges at 16nm? When do you make the decision to move from 28nm? Hear from SoC designers who crossed the great divide from 28nm to 16FF+ and emerged on the other side safely, seasoned, and successful. And listen to design ecosystem experts’ insights and guidance for crossing the divide smoothly.

REGISTER HERE

Tuesday, June 09, 2015
LUNCHEON:The Future of Digital is Here
Room 104
12:00 PM – 01:30 PM

In this panel, Cadence and a few of our customers will discuss an integrated digital implementation solution based on Cadence’s RTL synthesis, digital implementation, and signoff design tools and flows. These tools, which include the recently launched Innovus™ Implementation System, help designers successfully implement large, high-performance, advanced SoCs using 16/14/10nm FinFET processes as well as established process node SoCs.

REGISTER HERE

Wednesday, June 10, 2015
LUNCHEON:Methodology and Metrics for Analog/Mixed-Signal Verification: Madness or Marriage?
Room 104
12:00PM – 01:30PM

Hear the experts weigh in on the idea of applying the rigors of metric-driven verification planning and management from the digital realm to analog and mixed-signal design. Is this a natural progression of managing skyrocketing verification complexity, or is this a really bad idea because of skill sets, organizational boundaries, and the principles of divide and conquer? Enjoy a lively debate.

REGISTER HERE