Primarius Technologies at the 2024 Design Automation Conference

DAC attendees who stop by the Primarius Technologies booth (#1415) will be greeted by the breadth of its product portfolio that meet time-to-market windows and optimize designs for better yield, power, performance and area.

That includes ESDi^TM, a chip-level human body model (HBM) analysis platform and PTM^TM, a power device design and layout verification tool family, from Primarius’ acquisition of Magwel N.V., provider of 3D solver- and simulation-based layout analysis and design solutions for digital, analog/mixed-signal, power management, automotive and RF ICs.

Demonstrations will highlight Primarius’ fast, accurate modeling and cell library characterization and circuit simulation solutions based on its continuous innovation and R&D expertise, including:

• SDEP^TM, the spec-driven extraction platform that builds auto model extraction flows for fast SPICE model extraction, an engine enabling efficient Design-Technology Co-Optimization (DTCO), and an extended capability on top of the de facto golden-standard SPICE modeling platform, BSIMProPlus^TM.
• NanoSpice X^TM, the latest high-performance SPICE simulator addressing simulation capacity and accuracy challenges of big post-layout designs at advanced process nodes.
• NanoSpice Pro X^TM, the latest FastSPICE simulator with simulation performance and accuracy needs tailored for SRAM, DRAM, Flash and big analog-on-top designs in high-performance computing, mobile, AI and other advanced applications.
• NanoCell^TM, the latest standard cell library characterization solution employs advanced distributed parallel architecture technology and cell circuit analysis extraction algorithms, embedded with a high-precision SPICE simulator.
• ESDi, state-of-the-art HBM analysis, simulation and verification tool for on-chip ESD protection.

Chip companies worldwide rely on Primarius’ product portfolio as the continuous iteration of IC industry technology and complexity of IC manufacturing processes rise exponentially and challenges in designing and manufacturing high-end chips increase. Foundries and IDMs use Primarius tools and services to provide their design customers with more accurate SPICE models, completer and more reliable PDKs, and more comprehensive standard cell library within shorter development cycles. Chip designers who require stronger COT capabilities with customized devices and models, and re-characterized cell libraries based on actual applications benefit as well from Primarius’ products.

Primarius’ product portfolio is data-driven, achieving software and hardware synergy through leading semiconductor characteristic testing instruments and EDA products. It provides device testing systems for a full range of device characteristics such as IV, CV, reliability, statistical variation, and the industry-golden low frequency noise testing systems, 9812 series, used by semiconductor companies worldwide. Its latest release, 9812AC, is the only commercial low-frequency noise system under AC excitation, designed for the most advanced process development and chip designs.

Primarius provides complete EDA toolchain and a one-stop design enablement technical development solutions. Innovations like these can shorten the SPICE model development cycle from several months to a few weeks or even hours for quick iteration, addressing the efficiency bottleneck of DTCO. The advanced simulation technologies speed-up challenging circuit simulation, and the latest cell library characterization solution provides throughput with near-linear scaling on thousands of x86 or ARM CPU cores on computer farm or public cloud.

It enables faster turnaround from technology development to advanced chip designs, and solutions include advanced analysis capabilities for high-sigma yield, aging, EM/IR, ESD and signal integrity, targeting optimum yield and PPA.

Primarius Technologies will be in DAC booth #1415.

To arrange a meeting or demonstration of the Primarius Technologies product portfolio, send email to: contact@primarius-tech.com.