Empyrean visit at #60DAC

I arrived for my #60DAC booth appointment at Empyrean and was able to watch a customer presentation from Jason Guo, of Diodes. Jason was talking about how his company used the Patron tool for EM/IR analysis on their automotive chips. Diodes was found back in 1959 at Plano, Texas, and has since grown into 32 locations around the globe, offering chips for logic, analog, power management, precision timing and interconnect.

Diodes has also used the Empyrean ALPS tool for AMS simulation. For an EM analysis flow they use ALPS for circuit simulation plus Patron to see the EM, IR and pin voltages. They can quickly view the EM layout violations, then make fixes to the layout. Mr. Guo said that they’ve used Empyrean tools for about two years now, and that they are easy to learn and use.

The layout viewer is called Skipper, and the colors displayed represent voltage drops (IR), where red is a violation.

After the customer presentation I talked with Jason Xing of Empyrean to get an update on what’s new in the last 12 months. Mr. Xing that Empyrean now has a complete custom AMS design and verification tool flow, consisting of tools for:

• Schematic Capture
• Custom IC layout
• SPICE circuit simulation
• DRC and LVS checking
• EM/IR analysis

Designers of Power Management ICs (PMIC) can use Empyrean tools for both design and verification.

Something new for 2023 is standard cell and memory characterization, with a tool called Empyrean Liberal. Their approach for characterization uses a Static Timing Analysis (STA) method to measure delays with exhaustive searching, and no missed timing arcs. These tools are cloud ready for speeding up characterization run times, and they support LVF, an extension to the Liberty format to add statistical timing variation to the measurements.

RF circuit designers can use the Empyrean ALPS-RF circuit simulator for both frequency and time-domain simulations, supporting large signal, small signal and noise analysis.

The company has about 900 people now, and they went public in July 2022 on the China, Shenzhen exchange. Some 600 customers are using Empyrean EDA tools, and even the foundries are using their tools. Their headquarters are in Beijing, then R&D is done in Nanjing, Chengdu, Shanghai and Shenzhen.

Happy customers also include Willsemi, using the Empyrean Polas tool for reliability analysis of PMICs by measuring Rdson and performing EM analysis. Monolithic Power Systems (MPS) also uses the Polas power layout analysis tool. Renesas does SoC designs with complex clocking structures, and the Empyrean ClockExplorer tool helped improve the quality of their clock structures. O2Micro used the Empyrean AMS flow with the TowerJazz iPDK for their Power IC and analog design projects.

Summary

Empyrean has been blogged about here on SemiWiki since 2019, and I thoroughly enjoyed visiting their booth in July to see their new products and growth in the EDA industry. Their point tools have grown into tool flows supporting custom IC design and even flat panel design. I look forward to visiting them again in 2024 at DAC to report on new developments.

Related Blogs

• Empyrean Technology‘s Complete Design Solution for PMIC
• High Reliability Power Management Chip Simulation and Verification for Automotive Electronics
• Speed Up LEF Generation Times on Huge IC Designs
• Analysis of Curvilinear FPDs
• Curvilinear FPD Layout and Schematics
• Automating the Design of Flat Panel Displays