With each process generation, the design rules get more and more complex. One datapoint: there are twice as many checks at 28nm as there are at 90nm. In fact, the complexity of the rules is outpacing the ability to describe them using the simplified approaches used in the DRCs built-into layout editors or formats like LEF.

Worse still,… Read More

There has been a lot of press this past week surrounding the release of iPad2. While it has some significant improvements, they are, for the most part, incremental. In my view the lack of flash, a USB port and a memory card slot continue to be huge deficits. Until this past week my reservations about the iPad have been mostly theoretical,… Read More

One of the challenges with verifying today’s large chips is deciding which signals to record during simulation so that you can work out the root cause when you detect something anomalous in the results. If you record too few signals, then you risk having to re-run the entire simulation when you omitted to record a signal that… Read More

I was recently talking to a friend who works for a semiconductor company (I can’t tell you which one or how big it is. I am not even sure I can tell you that he/she works for a semiconductor company.) I was describing Semiwiki.com to him/her and this person thought it was a great concept but wondered how much of the site would be focused … Read More

And probably more protocols, like: Firewire, eSATA, HDMI …
Some of you probably know it as Light Peak, as it was the code name for the just announced (last week) Thunderbolt Intel proprietary interface, supporting copper (or optical) interconnect when Light Peak was optical only. This will make Thunderbolt easier to implement,… Read More

After 27 years in semiconductor design and manufacturing I actually had to look up the word collaboration. Seriously, I did not know the meaning of the word.

Collaboration:a recursive process where two or more people or organizations work together to realize shared goals, (this is more than the intersection of common goals seen… Read More

Thanks to the Semiconductor Ecosystem Survey from GSA-Wharton and the key indicators of semiconductor companies’ technology strategies related to IP:

• IP Reuse: On average, a fabless semiconductor company reuses about 63% of design IP in the revision of an existing product design and about 44% in a new product design.
• Source

The credit here goes to Atrenta for surveying their customer base in an effort to open up new communication channels for in-demand content using Web 2.0 technologies. The results are not surprising to me but they may be to other semiconductor ecosystem executives who do not get Social Media at all!

I have been using LinkedIn for five+… Read More

“IP Innovation is moving from component level to system level”. This mantra was heard during the conference, from various speakers: during the keynote talk by Ganesh R. from Gartner and presentation “Integration-Optimized IP from Cadence” by Ranga Srinivasan, also during discussion around coffee (or a glass … Read More