At SemiWiki we’ve written four times now about how TSMC is standardizing on a 3DIC physical flow with their approach called 3Dblox, so I watched a presentation from John Ferguson of Siemens EDA to see how their tool flow supports this with the Calibre tools. With a chiplet-based packaging flow there are new physical verification… Read More
Advances in Physical Verification and Thermal Modeling of 3DICs
If, like me, you’ve been paying too little attention to historically less glamorous areas of chip design like packaging, you’ll wake up one day and realize just how much things have changed and continue to advance and how interesting it’s become.
One of the main drivers here is the increasing use of chiplets to counter the decreasing… Read More
IEDM 2022 – TSMC 3nm
TSMC presented two papers on 3nm at the 2022 IEDM; “Critical Process features Enabling Aggressive Contacted Gate Pitch Scaling for 3nm CMOS Technology and Beyond” and “A 3nm CMOS FinFlexTM Platform Technology with Enhanced Power Efficiency and Performance for Mobile SOC and High Performance Computing Applications”.
When … Read More
TSMC OIP – Analog Cell Migration
The world of analog cell design and migration is quite different from digital, because the inputs and outputs to an analog cell often have a continuously variable voltage level over time, instead of just switching between 1 and 0. Kenny Hsieh of TSMC presented on the topic of analog cell migration at the recent North American OIP … Read More
Achieving 400W Thermal Envelope for AI Datacenter SoCs
Successful ASIC providers offer top-notch infrastructure and methodologies that can accommodate varied demands from a multitude of customers. Such ASIC providers also need access to best-in-class IP portfolio, advanced packaging and test capabilities, and heterogeneous chiplet integration capability among other things.… Read More
Samsung Versus TSMC Update 2022
After attending the TSMC and Samsung foundry conferences I wanted to share some quick opinions about the foundry business. Nothing earth shattering but interesting just the same. Both conferences were well attended. If we are not back to the pre pandemic numbers we are very close to it.
TSMC and Samsung both acknowledged that there… Read More
TSMC OIP – Enabling System Innovation
On November 10th I watched the presentation by L.C. Lu, TSMC Fellow & VP, as he talked about enabling system innovation with dozens of slides in just 26 minutes. TSMC is the number one semiconductor foundry in the world, and their Open Innovation Platform (OIP) events are popular and well attended as the process technology and… Read More
TSMC Expands the OIP Ecosystem!
This was the 12th TSMC OIP and it did not disappoint. The attendance was back to pre pandemic levels, there was interesting news and great presentations. We will cover the presentations in more depth after the virtual event which is on November 10th. You can register HERE.
As I mentioned in my previous post, the Jim Keller Keynote … Read More
TSMC 2022 Open Innovation Platform Ecosystem Forum Preview
One of my favorite events is just around the corner and that is the TSMC OIP Ecosystem Forum and it’s at my favorite Silicon Valley venue the Santa Clara Convention Center. Nobody knows more about the inner workings of the ecosystem than TSMC so this is the premier semiconductor collaboration event, absolutely.
In my 40 years as a … Read More
Micron and Memory – Slamming on brakes after going off the cliff without skidmarks
-Micron slams on the brakes of capacity & capex-
-But memory market is already over the cliff without skid marks
-It will likely take at least a year to sop up excess capacity
-Collateral impact on Samsung & others even more important
Micron hitting the brakes after memory market already impacts
Micron capped off an otherwise… Read More

