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Tiling Support in SiFive’s AI/ML Software Stack for RISC-V Vector-Matrix Extension

Tiling Support in SiFive’s AI/ML Software Stack for RISC-V Vector-Matrix Extension
by Daniel Nenni on 12-31-2025 at 10:00 am

SiFive AI ML RISC V Summit 2025

At the 2025 RISC-V Summit North America, Min Hsu, Staff Compiler Engineer at SiFive, presented on enhancing tiling support within SiFive’s AI/ML software stack for the RISC-V Vector-Matrix Extension (VME). This extension aims to boost matrix multiplication efficiency, a cornerstone of AI workloads. SiFive’s… Read More


RISC-V Extensions for AI: Enhancing Performance in Machine Learning

RISC-V Extensions for AI: Enhancing Performance in Machine Learning
by Daniel Nenni on 12-30-2025 at 10:00 am

SiFive Risc V Summit 2025

In a presentation at the RISC-V Summit North America 2025, John Simpson, Senior Principal Architect at SiFive, delved into the evolving landscape of RISC-V extensions tailored for artificial intelligence and machine learning. RISC-V’s open architecture has fueled its adoption in AI/ML markets by allowing customization… Read More


SiFive Launches Second-Generation Intelligence Family of RISC-V Cores

SiFive Launches Second-Generation Intelligence Family of RISC-V Cores
by Kalar Rajendiran on 09-18-2025 at 6:00 am

SiFive 2nd Gen Intelligence Family

SiFive, founded by the original creators of the RISC-V instruction set, has become the leading independent supplier of RISC-V processor IP. More than two billion devices already incorporate SiFive designs, ranging from camera controllers and SSDs to smartphones and automotive systems. The company no longer sells its own chips,… Read More


Podcast EP197: A Tour of the RISC-V Movement and SiFive’s Contributions with Jack Kang

Podcast EP197: A Tour of the RISC-V Movement and SiFive’s Contributions with Jack Kang
by Daniel Nenni on 12-08-2023 at 10:00 am

Dan is joined by Jack Kang of SiFive. As a member of the founding team at SiFive, Jack oversees the Business Development, Customer Experience, and Corporate Marketing groups. He is responsible for strategic business initiatives and partnerships, technical pre-sales activities and post-sales support, and corporate messaging… Read More


Enhancing RISC-V Vector Extensions to Accelerate Performance on ML Workloads

Enhancing RISC-V Vector Extensions to Accelerate Performance on ML Workloads
by Kalar Rajendiran on 05-17-2021 at 10:00 am

SuperCharge ML Performance

During the week of April 19th, Linley Group held its Spring Processor Conference 2021. The Linley Group has a reputation for convening excellent conferences. And this year’s spring conference was no exception. There were a number of very informative talks from various companies updating the audience on the latest research and… Read More


Enabling Edge AI Vision with RISC-V and a Silicon Platform

Enabling Edge AI Vision with RISC-V and a Silicon Platform
by Tom Simon on 03-15-2021 at 10:00 am

AI Chipset Market

AI vision processing moving to the edge is an undeniable industry trend. OpenFive, the custom silicon business unit of SiFive, discusses this trend with compelling facts in their recent paper titled “Enabling AI Vision at the Edge.” AI vision is being deployed in many applications, such as autonomous vehicles, smart cities, … Read More


SiFive Expands RISC-V Technology and its Ecosystem at the Fall Linley Processor Conference

SiFive Expands RISC-V Technology and its Ecosystem at the Fall Linley Processor Conference
by Mike Gianfagna on 11-11-2020 at 10:00 am

SiFive Expands RISC V Technology and its Ecosystem at the Fall Linley Processor Conference

 

As the Linley Fall Processor Conference winds down, there are certain presenting companies that left a lasting impression.  SiFive is one of those companies. On October 21, SiFive introduced the newest member of the SiFive Intelligence family of processor coresSiFive Intelligence family of processor cores, based on… Read More


Webinar: Build Your Next HBM2/2E Chip with SiFive

Webinar: Build Your Next HBM2/2E Chip with SiFive
by Mike Gianfagna on 05-04-2020 at 10:00 am

Screen Shot 2020 05 03 at 12.09.58 PM

I have been watching the trend for quite some time now that many advanced FinFET designs today are actually 2.5D systems in package. All of these 2.5D silicon interposer-based designs have high-bandwidth memory (HBM) stacks on board.  Often there are multiple memory stacks in both 4-high and 8-high configurations. If you follow… Read More


SiFive’s Approach to Embedding Intelligence Everywhere

SiFive’s Approach to Embedding Intelligence Everywhere
by Tom Simon on 04-27-2020 at 6:00 am

SiFive Embedding Intelligence

Before the advent of RISC-V, designers looking for embedded processors were effectively limited to a handful of proprietary processors using ISAs from decades ago. While the major ISAs are being updated and enhanced, they also are facing limitations from many decisions made over many years.  RISC-V was conceived with a clean… Read More


SiFive in a Virtual World Webinar Series 2020

SiFive in a Virtual World Webinar Series 2020
by Swamy Irrinki on 04-10-2020 at 6:00 pm

Rapid Embedded Prototyping with SiFive Software

Introducing the SiFive Connect Webinar Series –A Platform Designed for Continued Engagement with the Global Hardware and Software Community Developing RISC-V Based Semiconductor Solutions

After hosting the SiFive Tech Symposiums in a record 52 cities in 2019, it became amply evident that the RISC-V revolution has reached… Read More