Banner Electrical Verification The invisible bottleneck in IC design updated 1
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eFabless Design Challenge Results!

eFabless Design Challenge Results!
by Daniel Nenni on 03-28-2017 at 7:00 am

Will community engineering work for semiconductors? Will anyone show up? Well, the efabless design challenge is complete and the results are both interesting and encouraging, absolutely!

Efabless completed its low power voltage reference IP design challenge on Monday, March 13. This was a very interesting event that we followed… Read More


China to become largest semiconductor producer

China to become largest semiconductor producer
by Bill Jewell on 03-24-2017 at 12:00 pm

China has long been the largest market for semiconductors, accounting for over 50% of the global market for the last five years. China is now on track to become the largest semiconductor manufacturer in the next few years. The chart below shows China’s integrated circuit (IC) industry from 2010 to 2016, according to the China Semiconductor… Read More


Samsung Should Just Buy eSilicon Already!

Samsung Should Just Buy eSilicon Already!
by Daniel Nenni on 03-22-2017 at 12:00 pm

As you all know I’m a big fan of the ASIC business dating back to the start of the fabless semiconductor transformation where anybody could send a design spec to an ASIC company and get a chip back. The ASIC business model also started the smart phone revolution when Samsung built the first Apple SoCs for the iPhones and iPads.

Today … Read More


Succeeding with 56G SerDes, HBM2, 2.5D and FinFET

Succeeding with 56G SerDes, HBM2, 2.5D and FinFET
by Daniel Nenni on 03-17-2017 at 4:00 pm

eSilicon presented their advanced ASIC design capabilities at a seminar last Wednesday evening. This event was closed to the press, bloggers and analysts, but I managed to get some details from a friend who attended. The event title was: “Advanced ASICs for the Cloud-Computing Era: Succeeding with 56G SerDes, HBM2, 2.5D and FinFETRead More


Six Reasons to Consider Using FPGA Prototyping for ASIC Designs

Six Reasons to Consider Using FPGA Prototyping for ASIC Designs
by Daniel Payne on 03-15-2017 at 12:00 pm

There’s no doubt that programmable logic in FPGAs have transformed our electronics industry for the better. If you do ASIC designs then there’s always the pressure of getting first silicon correct, with no functional or timing bugs, because bugs will cause expensive re-spins and delay time to market. ASIC designers… Read More


Lu Dai: Incoming Accellera Chair

Lu Dai: Incoming Accellera Chair
by Bernard Murphy on 03-11-2017 at 7:00 am

One of the fun things about what I do is getting to meet some of the movers and shakers in the industry. You might not think of Accellera as a spot to find movers and shakers, but when you consider the impact they have had on what we do (OVL, SystemVerilog, UVM, UPF, SystemC, IP-XACT and others), design today would be unrecognizable without… Read More


SPIE 2017: EUV Readiness for High Volume Manufacturing

SPIE 2017: EUV Readiness for High Volume Manufacturing
by Scotten Jones on 03-03-2017 at 12:00 pm

The SPIE Advanced Lithography Conference is the world’s leading conference addressing photolithography. This year on the opening day of the conference, Samsung and Intel presented papers summarizing the readiness of EUV for high volume manufacturing (HVM). In this article, I will begin by summarizing the EUV plans … Read More


An Steegen ISS Talk and Interview – Patterning Options for Advanced Nodes

An Steegen ISS Talk and Interview – Patterning Options for Advanced Nodes
by Scotten Jones on 02-28-2017 at 12:00 pm

At the ISS Conference in January, An Steegen EVP of Semiconductor Technology & Systems at imec gave a talk entitled “Patterning Options for Advanced Technology Nodes”. I was present for her talk and had the opportunity to have a follow up interview with An.… Read More


Webinar: FPGA Prototyping and ASIC Design

Webinar: FPGA Prototyping and ASIC Design
by Bernard Murphy on 02-26-2017 at 4:00 pm

When you think about working with an ASIC service provider like Open-Silicon, you probably think about handling all the architecture, design and verification/validation in your shop, handing over a netlist and some other collateral, then the ASIC services provider takes responsibility for implementation and manufacturing.… Read More


Strong pickup in semiconductors in 2017

Strong pickup in semiconductors in 2017
by Bill Jewell on 02-26-2017 at 12:00 pm

World Semiconductor Trade Statistics (WSTS) is an organization of semiconductor companies created to collect market data. The members of WSTS also meet twice per year to develop forecasts for the semiconductor market. The “forecast by committee” approach of WSTS usually results in conservative forecasts. However, WSTS called… Read More