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Part 4 of this series discussed how a transistor Extension could be fabricated in a planar device without using an implant operation, and is instead formed using a preferential etch followed by a selective epitaxial deposition. This final installment of the series will present the formation of an Extension in a FinFET transistor… Read More
Perhaps the most innovative and effective Extension implant does not involve an implant at all, but is instead an etch followed by a selective epitaxial deposition.
In this Extension fabrication methodology the Source/Drains regions in a planar device are etched away in the normal fashion to accommodate the replacement Source/Drain… Read More
Just two more weeks before the 2019 CEO Outlook Thursday, May 23, at SEMI. If you haven’t registered yet, do so today. We’re expecting a full house as a result of our powerhouse lineup and networking opportunities.
That lineup includes Ed Sperling, editor in chief of Semiconductor Engineering, who will serve as moderator. Panelists… Read More
Nice numbers despite the cycle bottom
KLA put up EPS of $1.80 versus street of $1.67 on revenues of $1.097B versus street of $1.08B. However guidance was weaker than the street was hoping for with a range of $1.21B to $1.29B in revenues generating between $1.55 and $1.85 in non GAAP EPS. This is compared to current street estimates … Read More
Having just completed a cloud evaluation for SemiWiki I can tell you why eSilicon chose Google. Simply put, they are working harder to get cloud business. Google ($4B) is the number five cloud provider behind Microsoft ($21.2B), Amazon ($20.4B), IBM ($10.3B) and Oracle ($6.08B). There is a lot of money in the cloud and a lot more … Read More
…but ARM, Imagination, MIPS or Ceva have declined and lose market share. Semiconductor design IP market is still doing good in 2018, with 6% growth year over year. It’s half the growth rate seen in 2017, 2016 and 2015 and the growth decline is imputable to bad results from ARM, the market leader, but also from Imagination (#4), MIPS… Read More
The problem of traditional FinFET Extension Implant doping concerns the awkward 3-dimensional structure of the fin. Because the Extension Implant defines the conductive electrical pathway between the Source/Drains and the undoped channel portion of the fin, it is essential that the fin be uniformly doped all three of its surfaces… Read More
Samsung and TSMC have both made recent disclosures about their 5nm process and I though it would be a good time to look at what we know about them and compare the two processes.
A lot of what has been announced about 5nm is in comparison to 7nm so we will first review 7nm.
7nm
Figure 1 compares Samsung’s 7LPP process to TSMC’s 7FF and 7FFP… Read More
The use of hard masks instead of photoresist for the Extension implant is an effective way to optimize the amount of dopant that is retained along the fin sidewalls for those fins that border along photoresist edges (as discussed in Part 1 of this series).
However, hard masks do nothing to address the dominant problem driving steeper… Read More
The 3D character of FinFET transistor structures pose a range of unique fabrication problems that can make it challenging to get these devices to yield. This is especially true for the all-important Extension implant that is put in place just prior to the nitride spacer formation.
The Extension implant is a central component of… Read More
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Intel to Compete with Broadcom and Marvell in the Lucrative ASIC Business