SILVACO 073125 Webinar 800x100
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DAC 2021 – Accellera Panel all about Functional Safety Standards

DAC 2021 – Accellera Panel all about Functional Safety Standards
by Daniel Payne on 12-14-2021 at 10:00 am

FS data format min

Functional safety has been at the forefront of the electrification of our vehicles with new ADAS features, and the push to reach autonomous driving, while having compliance with the ISO 26262 functional safety standard. I attended the Accellera hosted panel discussion on Monday at DAC, hearing from functional safety panelists… Read More


Intel Discusses Scaling Innovations at IEDM

Intel Discusses Scaling Innovations at IEDM
by Scotten Jones on 12-14-2021 at 6:00 am

Intel at IEDM Slides Page 1

Standard Cell Scaling

Complex logic designs are built up from standard cells, in order to continue to scale logic we need to continually shrink the size of standard cells.

Figure 1 illustrates the dimensions of a standard cell.

 Figure 1. Standard Cell Dimensions.

 From figure 1 we can see that shrinking standard cell sizes requires… Read More


Webinar: The Backstory of PCIe 6.0 for HPC, From IP to Interconnect

Webinar: The Backstory of PCIe 6.0 for HPC, From IP to Interconnect
by Mike Gianfagna on 12-01-2021 at 8:00 am

The Backstory of PCIe 6.0 for HPC From IP to Interconnect

PCIe, or peripheral component interconnect express, is a very popular high-speed serial computer expansion bus standard. The width and speed the standard supports essentially defines the throughput for high-performance computing (HPC) applications.  The newest version, PCIe 6.0 promises to double the bandwidth that the… Read More


Silicon Catalyst Hosts an All-Star Panel December 8th to Discuss What Happens Next?

Silicon Catalyst Hosts an All-Star Panel December 8th to Discuss What Happens Next?
by Mike Gianfagna on 11-29-2021 at 6:00 am

Silicon Catalyst Hosts an All Star Panel December 8th to Discuss What Happens Next

Each year, Silicon Catalyst assembles a panel of industry luminaries to discuss important questions about the future. The charter of the Silicon Catalyst Industry Forum is to: “create a platform for broad-topic dialog among all stakeholders involved in the semiconductor industry value chain. The Forum topics focus on technicalRead More


Supply Chain Breaks Under Strain Causes Miss, Weak Guide, Repairs Needed

Supply Chain Breaks Under Strain Causes Miss, Weak Guide, Repairs Needed
by Robert Maire on 11-21-2021 at 8:00 am

Applied Materials

-AMAT -Supply chain can’t keep up with expanding business
-May be longer term issue which will limit upside
-Being tough on vendors may have come back to bite Applied
-Fixing supply chain will likely take longer than the current cycle

Supply Chain issues come home to roost

Applied Materials missed on both earnings and revenues… Read More


2021 Semiconductors Finishing Strong with 2022 Moderating

2021 Semiconductors Finishing Strong with 2022 Moderating
by Bill Jewell on 11-19-2021 at 8:00 am

Top Semiconductor Comoany Reveue 2021

The semiconductor market in 3rd quarter 2021 was $144.8 billion, according to WSTS, up 7.4% from the prior quarter and up 27.6% from a year ago. The strong year-to-year growth was a slight deceleration from 30.4% in 2nd quarter 2021. The major memory companies reported very healthy 3Q21 revenue increases versus 2Q21 with all of … Read More


KLAC- Foundry/Logic Drives Outperformance- No Supply Chain Woes- Nice Beat

KLAC- Foundry/Logic Drives Outperformance- No Supply Chain Woes- Nice Beat
by Robert Maire on 11-04-2021 at 8:00 am

KLAC Tencor SemiWiki

KLA- great quarter driven by continued strong foundry/logic
No supply chain hiccups- Riding high in the cycle
Wafer inspection remains driver with rest along for the ride
Financials remain best in industry

A superb quarter
There was little to complain about in the quarter. Revenues of $2.1B and EPS of $4.64, both nicely beating… Read More


Alchip Reveals How to Extend Moore’s Law at TSMC OIP Ecosystem Forum

Alchip Reveals How to Extend Moore’s Law at TSMC OIP Ecosystem Forum
by Mike Gianfagna on 11-03-2021 at 10:00 am

Alchip Reveals How to Extend Moores Law at TSMC OIP Ecosystem Forum

The TSMC Open Innovation Platform (OIP) event brings together a wide array of companies reporting cutting edge work that are part of TSMC’s rather substantial ecosystem. The event covers everything from high-performance computing to mobile, automotive, IoT, RF and 3D IC design. Of particular interest for this post is a presentation… Read More


SISPAD – Cost Simulations to Enable PPAC Aware Technology Development

SISPAD – Cost Simulations to Enable PPAC Aware Technology Development
by Scotten Jones on 10-31-2021 at 10:00 am

Slide11

I was invited to give a plenary address at the SISPAD conference in September 2021. For anyone not familiar with SISPAD it is a premiere TCAD conference. This year for the first time SISPAD wanted to address cost and my talk was “Cost Simulations to Enable PPAC Aware Technology Development”.

For many years the standard in technology… Read More


Intel – “Super” Moore’s Law Time warp-“TSMC inside” GPU & Global Flounders IPO

Intel – “Super” Moore’s Law Time warp-“TSMC inside” GPU & Global Flounders IPO
by Robert Maire on 10-31-2021 at 6:00 am

GF TSMC Intel

“Super” Moore’s Law- 5 nodes in 4 years- Too good to be true?
Gelsinger said “Intel will be advantaged with High NA EUV”
Ponte Vecchio better with “TSMC Inside”
Global Flounders IPO as price drops on public debut

Lets do the time warp again….(apologies to Riff Raff)

Its just … Read More