Previously, I examined chip design in the late 1970s and early 1980s. It was a nostalgic ride – thanks to all those who shared their stories. I enjoyed reading all of them. I drew two basic conclusions in the prior post:
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Design Virtualization Technology: VMWare for SoCs
It was way back in 2001 that Pat Gelsinger, then CTO of Intel, pointed out that if we kept increasing clock rates that chips would have the power density of rocket nozzles and nuclear reactor cores. Ever since then power has been public enemy #1 in chip design. In 2007 Apple announced the iPhone and the application processor inside … Read More
Chip Design Problems Remain the Same, More or Less
For those who may not know me, here is a brief introduction. I started in the semiconductor business when RCA was still making vacuum tubes and I wrote EDA software before there was an EDA industry. I’ve designed and sold chips and developed, sold and used EDA tools at companies as big as General Electric and as small as seven people.… Read More
SEMICON West, Free For Two More Days
SEMICON West is coming up July 14-16th. As always it is in San Francisco at the Moscone Center. Why should you go? Because SEMICON West attracts more than 30,000 professional attendees representing the leading global technology companies, including IDMs, foundries, fabless, contract packaging and test houses, OEMs, materials… Read More
ASMC 2015 Preview
From May 3[SUP]rd[/SUP] to May 6[SUP]th[/SUP] the 26[SUP]th[/SUP] annual Advanced Semiconductor Manufacturing Conference (ASMC) will be held in Saratoga Springs, New York.
The ASMC offers a unique view of challenges to the semiconductor industry focusing on things like defect reduction, metrology and fab operations. In… Read More
2015 Semiconductor Capex led by Memory & Foundry
Semiconductor industry capital expenditures (capex) in 2015 are expected to be $69 billion in 2015, up 6% from $65 billion in 2014 according to IC Insights. We at Semiconductor Intelligence have compiled 2015 capex outlook by company. The major memory companies account for 38% of 2015 capex and the major foundries account for … Read More
Moore’s Law is dead, long live Moore’s Law – part 5
In the first four installments of this series we have examined Moore’s law, described the drivers that have enabled Moore’s law and discussed the specific status and issues around DRAM and logic. In this final installment we will examine NAND Flash.… Read More
Moore’s Law is dead, long live Moore’s Law – part 4
In the third installment of this series we discussed the status of DRAM scaling and Moore’s law. In this installment we will tackle logic. The focus will be on foundry logic.
Logic technology challenges
In the second installment of this series we discussed constant electric field scaling. As we mentioned in that installment at … Read More
Moore’s Law is dead, long live Moore’s Law – part 3
In the second installment of this series we reviewed the cost drivers that have enabled the semiconductor industry to continue to cost reduce the cost per transistor year after year. In the next three installments we will discuss the product specific issues beginning with this installment discussing DRAM.… Read More
Moore’s Law is dead, long live Moore’s Law – part 2
In the first installment of this series on Moore’s law we examined what Moore’s law is and presented some data on how it has affected the industry. In this installment we will discuss the manufacturing cost reduction strategies that have made Moore’s law possible.
Manufacturing Cost Drivers
The manufacturing cost of a semiconductor… Read More
Intel’s Path to Technological Leadership: Transforming Foundry Services and Embracing AI