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2019 GSA Silicon Summit and SiFive

2019 GSA Silicon Summit and SiFive
by Daniel Nenni on 06-28-2019 at 8:00 am

Naveed Sherwani, President and CEO of SiFive, did the keynote for this year’s Silicon Summit. This is one of the premier events for the C level executives in Silicon Valley, absolutely. Naveed is one of the top visionaries for the semiconductor industry and he certainly did not disappoint this time or any other time in my experience.… Read More


Considering SiFive: What Should I Get to Implement a RISC-V Core?

Considering SiFive: What Should I Get to Implement a RISC-V Core?
by Randy Smith on 06-17-2019 at 10:00 am

I have an old weathered leather-clad black notebook with a National Semiconductor logo on its face that I have used since 2001. It has sentimental value to me. First, it reminds me of where I was on 9/11, having breakfast with a group of attendees to National Semiconductor’s executive event in Laguna Niguel, CA. We were going to play… Read More


#56thDAC SerDes, Analog and RISC-V sessions

#56thDAC SerDes, Analog and RISC-V sessions
by Eric Esteve on 06-14-2019 at 5:00 am

The good news is that the next five DAC events will take place in Moscone Center in San Francisco! If going to Las Vegas from the Bay area is an easy trip, coming from Europe to Las Vegas makes it a 24+hours journey… One obvious consequence was the poor attendance to the exhibition floor. But let’s be positive and notice that the number… Read More


The RISC-V Revolution is Sweeping Across the APAC Region and Australia

The RISC-V Revolution is Sweeping Across the APAC Region and Australia
by Daniel Nenni on 06-10-2019 at 9:14 pm

Join SiFive Tech Symposiums in Tokyo, Daejeon, Pangyo, Hsinchu, Singapore and Sydney

As we make our way around the world meeting and engaging with others in the semiconductor and hardware design community, we are seeing an increased interest in RISC-V based hardware innovation. This is due in large part to the emergence of  market-ready… Read More


The SiFive Tech Symposiums are Heading to Six Cities in Europe in May!

The SiFive Tech Symposiums are Heading to Six Cities in Europe in May!
by Daniel Nenni on 05-12-2019 at 4:00 pm

Hello Cambridge, Grenoble, Stockholm, Moscow, Munich and Amsterdam
Our 2019 global symposiums and workshops have been hugely successful in promoting the RISC-V ISA and fostering expansive collaboration within the open-source community. It’s invigorating to see how the worldwide semiconductor ecosystem is energized and… Read More


The Revolution Evolution Continues – SiFive RISC-V Technology Symposium – Part II

The Revolution Evolution Continues – SiFive RISC-V Technology Symposium – Part II
by Camille Kokozaki on 03-20-2019 at 5:00 am

During the afternoon session of the Symposium, Jack Kang, SiFive VP sales then addressed the RISC-V Core IP for vertical markets from consumer/smart home/wearables to storage/networking/5G to ML/edge. Embedding intelligence from the edge to the cloud can occur with U Cores 64-bit Application Processors, S Cores 64-bit Embedded… Read More


The Revolution Evolution Continues – SiFive RISC-V Technology Symposium – Part I

The Revolution Evolution Continues – SiFive RISC-V Technology Symposium – Part I
by Camille Kokozaki on 03-19-2019 at 5:00 am

SiFive held a RISC-V Technology Symposium on February 26 at the Computer History Museum in Mountain View. Keith Witek, SiFive SVP Corporate Development and Strategy kicked off the event and introduced the first keynote speaker Martin Fink, Western Digital CTO, at the time acting CEO of the RISC-V Foundation (as of this writing,… Read More


The RISC-V Revolution is Going Global!

The RISC-V Revolution is Going Global!
by Daniel Nenni on 02-21-2019 at 12:00 pm

This Month, you can Join us in Austin, Mountain View or Boston
In 2018, we hosted several RISC-V technology symposia in India, China and Israel. These events were very successful in fueling the growing momentum surrounding the RISC-V ISA in these countries. It turns out that these events were just the tip of the iceberg. In 2019, … Read More


SOC security is not a job for general purpose CPUs

SOC security is not a job for general purpose CPUs
by Tom Simon on 01-14-2019 at 7:00 am

Life is full of convenience-security tradeoffs. Sometimes these are explicit, where you get to make an active choice about how secure or insecure you want things to be. Other times we are unaware of the choices we are making, and how risky they are for the convenience provided. If you leave your bike unlocked, you can expect it to be… Read More


You Will Not Get Fired for Choosing RISC-V

You Will Not Get Fired for Choosing RISC-V
by Camille Kokozaki on 12-27-2018 at 7:00 am

These were the closing words Yunsup Lee, CTO, SiFive used at one of the December RISC-V Summit Keynotes entitled ‘Opportunities and Challenges of Building Silicon in the Cloud’. Fired up was more the mood among the 1000+ attendees of the RISC-V Summit held at the Santa Clara Convention Center and SiFive was among the companies showcasing… Read More