Neural network models are advancing rapidly and becoming more complex. Application developers using these new models need faster AI inference but typically can’t afford more power, space, or cooling. Researchers have put forth various strategies in efforts to wring out more performance from AI inference architectures,… Read More
Semiconductor Intellectual Property
DSP Innovation Promises to Boost Virtual RAN Efficiency
5G is already real, though some of us are wondering why our phone connections aren’t faster. That perspective misses the real intent of 5G – to extend high throughput (and low latency) communication to a vast number and variety of edge devices beyond our phones. One notable application is Fixed Wireless Access (FWA), promising … Read More
Multi-Die Systems Key to Next Wave of Systems Innovations
These days, the term chiplets is referenced everywhere you look, in anything you read and in whatever you hear. Rightly so because the chiplets or die integration wave is taking off. Generally speaking, the tipping point that kicked off the move happened around the 16nm process technology when large monolithic SoCs started facing… Read More
Maven Silicon’s RISC-V Processor IP Verification Flow
RISC-V is a general-purpose license-free open Instruction Set Architecture [ISA] with multiple extensions. It is an ISA separated into a small base integer ISA, usable as a base for customized accelerators and optional standard extensions to support general-purpose software development. RISC-V supports both 32-bit and … Read More
Physically Aware NoC Design Arrives With a Big Claim
I wrote last month about physically aware NoC design, so you shouldn’t be surprised that Arteris is now offering exactly that capability 😊. First, a quick recap on why physical awareness is important, especially below 16nm. Today, between the top level and subsystems a state-of-art SoC may contain anywhere from five to twenty … Read More
Area-optimized AI inference for cost-sensitive applications
Often, AI inference brings to mind more complex applications hungry for more processing power. At the other end of the spectrum, applications like home appliances and doorbell cameras can offer limited AI-enabled features but must be narrowly scoped to keep costs to a minimum. New area-optimized AI inference technology from… Read More
PCIe 6.0: Challenges of Achieving 64GT/s with PAM4 in Lossy, HVM Channels
As the premier high-speed communications and system design conference, DesignCon 2023 offered deep insights from various experts on a number of technical topics. In the area of high-speed communications, PCIe has a played a crucial role over the years in supporting increasingly higher communications speed with every new revision.… Read More
Optimization Tradeoffs in Power and Latency for PCIe/CXL in Datacenters
PCI Express Power Bottleneck
Madhumita Sanyal, Sr. Technical Product Manager, and Gary Ruggles, Sr. Product Manager, discussed the tradeoffs between power and latency in PCIe/CXL data centers during a live SemiWiki webinar on January 26, 2023. The demands on PCIe continue to grow with the integration of multiple components… Read More
Alphawave Semi at the Chiplet Summit
The first annual Chiplet Summit was held last week in San Jose and I must say it exceeded my expectations, but I have some advice for the participating speakers and sponsoring companies. A good portion of the content was on WHY chiplets and not HOW. I think we have progressed passed this point and if we keep dwelling on it we will delay… Read More
Weebit ReRAM: NVM that’s better for the planet
Together with our R&D partner CEA-Leti, we recently completed an environmental initiative in which we analyzed the environmental impact of Weebit’s Resistive Random-Access Memory (ReRAM / RRAM) technology compared to Magnetoresistive Random Access Memory (MRAM) – another emerging non-volatile memory (NVM) technology.… Read More
Musk’s new job as Samsung Fab Manager – Can he disrupt chip making? Intel outside