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Video EP9: How Cycuity Enables Comprehensive Security Coverage with John Elliott

Video EP9: How Cycuity Enables Comprehensive Security Coverage with John Elliott
by Daniel Nenni on 08-15-2025 at 10:00 am

In this episode of the Semiconductor Insiders video series, Dan is joined by John Elliott, security applications engineer from Cycuity. With 35 years of EDA experience, John’s current focus is on security assurance of hardware designs.

John explains the importance of security coverage in the new global marketplace. He describes… Read More


Security Coverage: Assuring Comprehensive Security in Hardware Design

Security Coverage: Assuring Comprehensive Security in Hardware Design
by Daniel Nenni on 07-24-2025 at 10:00 am

Assuring Comprehensive Security in Hardware Design

As hardware systems become increasingly complex and security threats grow more sophisticated, ensuring robust hardware security during the pre-silicon phase of development is more critical than ever. Cycuity’s white paper outlines how its Radix platform enables engineers to verify, visualize, and measure the effectiveness… Read More


Arteris Simplifies Design Reuse with Magillem Packaging

Arteris Simplifies Design Reuse with Magillem Packaging
by Mike Gianfagna on 07-08-2025 at 6:00 am

Arteris Simplifies Design Reuse with Magillem Packaging

Many know Arteris as the “network-on-chip”, or NoC, company. Through acquisitions and forward-looking development, the footprint for Arteris has grown beyond smart interconnect IP. At DAC this year, Arteris highlighted its latest expansion with a new SoC integration automation product called Magillem Packaging. The announcement… Read More


Arteris at the 2025 Design Automation Conference #62DAC

Arteris at the 2025 Design Automation Conference #62DAC
by Daniel Nenni on 06-22-2025 at 8:00 am

62nd DAC SemiWiki

Key Takeaways:

  • Expanded Multi-Die Solution: Arteris showcases its foundational technology for rapid chiplet-based innovation. Check out the multi-die highlights video.
  • Ecosystem compatibility: Supported through integration with products from major EDA and foundry partners, including Cadence, Synopsys, and global
Read More

Arteris Expands Their Multi-Die Support

Arteris Expands Their Multi-Die Support
by Bernard Murphy on 06-18-2025 at 6:00 am

multi die use cases min

I am tracking the shift to multi-die design, so it’s good to see Arteris extend their NoC expertise, connecting chiplets across an interposer. After all, network connectivity needs don’t stop at the boundaries of chiplets. A multi-die package is at a logical level just a scaled-up SoC for which you still need traffic routing and… Read More


Podcast EP287: Advancing Hardware Security Verification and Assurance with Andreas Kuehlmann

Podcast EP287: Advancing Hardware Security Verification and Assurance with Andreas Kuehlmann
by Daniel Nenni on 05-16-2025 at 10:00 am

Dan is joined by Dr. Andreas Kuehlmann, Executive Chairman and CEO at Cycuity. He has spent his career across the fields of semiconductor design, software development, and cybersecurity. Prior to joining Cycuity, he helped build a market-leading software security business as head of engineering at Coverity which was acquired… Read More


Leveraging Common Weakness Enumeration (CWEs) for Enhanced RISC-V CPU Security

Leveraging Common Weakness Enumeration (CWEs) for Enhanced RISC-V CPU Security
by Kalar Rajendiran on 05-13-2025 at 6:00 am

Information Flow Analysis Cycuity's Unique Approach

As RISC-V adoption accelerates across the semiconductor industry, so do the concerns about hardware security vulnerabilities that arise from its open and highly customizable nature. From hardware to firmware and operating systems, every layer of a system-on-chip (SoC) design must be scrutinized for security risks. Unlike… Read More


How Arteris is Revolutionizing SoC Design with Smart NoC IP

How Arteris is Revolutionizing SoC Design with Smart NoC IP
by Mike Gianfagna on 05-12-2025 at 6:00 am

How Arteris is Revolutionizing SoC Design with Smart NoC IP

Recently, Design & Reuse held its IP-SoC Days event at the Hyatt Regency in Santa Clara. Advanced IP drives a lot of the innovation we are seeing in chip design. This event provides a venue for IP providers to highlight the latest products and services and share a vision of the future. IP consumers are anxious to hear about all the… Read More


Podcast EP277: How Arteris FlexGen Smart NoC IP Democratizes Advanced Chip Design with Rick Bye

Podcast EP277: How Arteris FlexGen Smart NoC IP Democratizes Advanced Chip Design with Rick Bye
by Daniel Nenni on 03-07-2025 at 10:00 am

Dan is joined by Rick Bye, director of product management and marketing at Arteris with responsibility for the FlexNoC family of non-coherent Network-on-Chip IP products. Rick joined Arteris from Arm where he was a senior product manager in the Client Line of Business, responsible for a demonstration SoC and compression IP. … Read More


CEO Interview: Dr. Andreas Kuehlmann of Cycuity

CEO Interview: Dr. Andreas Kuehlmann of Cycuity
by Daniel Nenni on 02-28-2025 at 8:00 am

Andreas 2022 Headshot cropped (2)

Dr. Andreas Kuehlmann, Executive Chairman and CEO at Cycuity, has spent his career across the fields of semiconductor design, software development, and cybersecurity. Prior to joining Cycuity, he helped build a market-leading software security business as head of engineering at Coverity and, after its acquisition by Synopsys,… Read More